Data Integrity and Error Handling

Figure 6-2. SDC Error Data Flow

From Processor

To Processor

1b/16b parity

To

SAC

 

 

 

 

 

 

 

 

 

Check parity, if bad

 

 

 

Correct if 1x; if 2x, then write

 

poison ECC of chunk.

 

 

 

 

Retire ITID and report error.

 

 

 

into DB with bad parity on chunk

 

 

 

 

 

 

 

 

 

 

 

 

that is bad. Set status. No reporting.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Check and flag

 

 

 

 

 

 

 

 

 

 

 

 

status;

 

 

 

 

 

 

 

 

 

 

 

 

regenerate

 

 

 

 

 

 

 

 

 

 

 

 

new parity, if

 

1b/8b parity

S

D

 

Data Buffer

 

 

 

 

incoming is bad

 

 

 

 

 

 

 

 

 

 

 

 

then generate new

 

 

 

 

 

 

 

 

 

 

 

parity as bad.

 

 

 

 

 

 

 

 

 

 

 

On data to SAC

 

 

 

 

 

 

 

 

 

 

 

send with bad

 

 

 

 

 

 

 

 

 

 

 

parity if parity

 

 

 

 

 

 

 

Correct if 1x;

 

if data is bad in

 

 

 

 

Check, if bad

 

if 2x write to

 

buffer. Report

 

 

 

 

poison ECC of

 

DB with bad

 

 

 

 

 

 

parity, flag

 

error.

 

 

 

 

bad chunk. Retire

 

 

 

 

 

 

 

status. Set S

 

 

 

 

 

 

 

ITID and report

 

 

 

 

 

 

 

 

 

or D bit if error

 

 

 

 

 

 

 

error.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6.10Error Conditions

6.10.1Table of Errors

Table 6-1is a list of possible errors found in the system. The table shows the error and the system action. It also shows the information that is captured on any failure. The captured info is sticky through reset and can be read through configuration accesses. If the system action is conditional, then the qualifier column shows what the action is conditional on. Note that for the BINIT#, XBINIT#, and the interrupts there is a driver enable. If the driver is disabled, then these signals won’t be active, even if it says Unconditional in the table.

Intel® 460GX Chipset Software Developer’s Manual

6-15