Intel 460GX 14.2System Management Register Descriptions, 14.2.3PCICMD–PCICommand Register (Function 3), 14.2.1VID–VendorIdentification Register (Function 3)

SM Bus Controller Configuration

14.2System Management Register Descriptions

This section describes in detail the registers associated with the IFB System Management Function.

14.2.1VID–Vendor Identification Register (Function 3)

Address Offset:	00–01h
Default Value:	8086h
Attribute:	Read only

The VID Register contains the vendor identification number. This register, along with the Device Identification Register, uniquely identifies any PCI device. Writes to this register have no effect.

Bit Description

15:0 Vendor Identification Number. This is a 16-bit value assigned to Intel.

14.2.2DID–Device Identification Register (Function 3)

Address Offset:	02-03h
Default Value:	7603h
Attribute:	Read only

The DID Register contains the device identification number. This register, along with the VID Register, defines the IFB Power Management Controller. Writes to this register have no effect.

Bit Description

15:0 Device Identification Number. This is a 16-bit value assigned to the IFB System Management Controller.

14.2.3PCICMD–PCI Command Register (Function 3)

Address Offset:	04-05h
Default Value:	00h
Attribute:	Read/Write

This register controls access to the I/O space registers.

Bit	Description
15:10	Reserved. Read 0.
9	Fast Back to Back Enable (Not Implemented). This bit is hardwired to 0.
8:5	Reserved. Read as 0.
4	Memory Write and Invalidate Enable (Not Implemented). This bit is hardwired to 0.
3	Special Cycle Enable (SCE). 1 = Enable, the IFB recognizes the Stop Grant special cycle.
	0=Disable. The SCE bit in Function 1 PCI Command register controls IFB response to the
	Shutdown special cycle.
2	Bus Master Enable (Not Implemented). This bit is hardwired to 0.

14-2 Intel® 460GX Chipset Software Developer’s Manual