Lincoln Electric SVM112-B service manual Pulse Width Modulation, Minimum Output, Maximum Output

Return to Section TOC

Return to Section TOC

Return to Master TOC

Return to Master TOC

E-12 E-12

THEORY OF OPERATION

PULSE WIDTH MODULATION

FIGURE E.11 – TYPICAL FET OUTPUTS

	(+)
					(–)
1 ∝sec		48 ∝sec
		50	∝sec			∝sec
	1

MINIMUM OUTPUT

(+)

(–)

20 ∝sec
	10	∝sec		20 ∝sec
			50 ∝sec

MAXIMUM OUTPUT

Return to Section TOC

to Section TOC

Return to Master TOC

to Master TOC

The term PULSE WIDTH MODULATION is used to describe how much time is devoted to conduction in the positive and negative por- tions of the cycle. Changing the pulse width is known as MODULATION. Pulse Width Modulation (PWM) is the varying of the pulse width over the allowed range of a cycle to affect the output of the machine.

MINIMUM OUTPUT

By controlling the duration of the gate signal, the FET is turned on and off for different dura- tions during a cycle. The top drawing above shows the minimum output signal possible over a 50-microsecond time period.

The positive portion of the signal represents one FET group1 conducting for 1 microsec- ond. The negative portion is the other FET group1. The dwell time (off time) is 48 micro- seconds (both FET groups off). Since only 2 microseconds of the 50-microsecond time period is devoted to conducting, the output power is minimized.

MAXIMUM OUTPUT

By holding the gate signals on for 20 micro- seconds each and allowing only 10 microsec- onds of dwell time (off time) during the 50- microsecond cycle, the output is maximized. The darkened area under the top curve can be compared to the area under the bottom curve. The more dark area under the curve, the more power is present.

Return

Return

1A FET group consists of the sets of FET modules grouped onto one switch board.

POWER WAVE 450