2.4 System Board Troubleshooting | 2 Troubleshooting Procedures |
Table
LED Status | Test item | Message |
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B5H | Storing key scan code |
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| Setting of TASK_1ms_TSC |
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| Display initialization |
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B6H | FAN control |
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| Sound controller initialization (for | Enabling system speaker |
| beep) |
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| Disabling mute | |
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| |
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| Setting volume to max |
|
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| Message display | CEC/KBC UPDATE/DAMAGED, BIOS |
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| UPDATE/DAMAGED |
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| Key input | Disabling USB |
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| Sound beep |
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| Waiting for key input |
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| Reading | FDC reset |
| CHGBIOSA.EXE/CHGFIRMA.EXE |
|
| Setting of parameter for 2HD (1.44MB), transmission rate | |
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| |
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| Reading first sector |
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| Setting of parameter for 2DD (720KB), transmission rate |
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| Search of CHGBIOSA.EXE from route directory |
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| Calculation of directory start head, sector |
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| Reading contents of route directory by one sector |
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| Search of entry for "CHGBIOSA.EXE"/ |
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| "CHGFIRMA.EXE", from the sector read |
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| Reading of EXE header of "CHGBIOSA.EXE"/ |
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| "CHGFIRMA.EXE" key input when an error occurred |
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| Execute "CHGBIOSA.EXE"/"CHGFIRMA.EXE" |
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B3H | Prohibition of cache | Prohibition of cache |
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| Initialization of special register |
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00H | PIT CH1 initialization | (Setting refresh interval to 30ms) |
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01H | Check of DRAM type and size | (at Cold Boot) |
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| (HLT when the DRAM type is 0) |
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| (HLT when the stack area can not be used .) | |
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02H | Cache configuration |
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| Enabling L1 cache |
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| CMOS access test | (at Cold Boot) (HLT when an error is detected.) |
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|
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| Battery level check of CMOS |
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| CMOS checksum check |
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TECRA M1 Maintenance Manual (960 |
