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PCI Configuration Submenu
Default values are in bold typeface.
Feature | Option |
Processor Bus | 100 MHz |
PCI Slots | PCI 33 |
PCI Slots | PCI 33 |
PCI Slots | PCI 33 |
| PCI 66 |
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PCI Slots | PCI 33 |
| PCI 66 |
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PCI Bus Default | PCI 33 |
| PCI 66 |
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PCI Device, Embedded SCSI |
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PCI Slot 1 |
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PCI Slot 2 |
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PCI Slot 3 |
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PCI Slot 4 |
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PCI Slot 5 |
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PCI Slot 6 |
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PCI Slot 7 |
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PCI Slot 8 |
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PCI Slot 9 |
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PCI Slot 10 |
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Description
Displays the clock speed of the Processor Bus.
Displays the clock speed and setting of PCI Segment A.
Displays the clock speed and setting of PCI Segment B.
Displays the clock speed and setting of PCI Segment C.
Displays the clock speed and setting of PCI Segment D.
If no cards are present behind a
Selects PCI Mode submenu for the embedded LVDS controller.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this PCI slot.
Selects PCI Mode Submenu for this
Selects PCI Mode Submenu for this
Selects PCI Mode Submenu for this
Selects PCI Mode Submenu for this
PCI Mode Submenu
Default values are in bold typeface.
Feature | Option |
Option ROM Scan | Disabled |
| Enabled |
Enable Master | Disabled |
| Enabled |
Latency Timer | Default |
| 0020h |
| 0040h |
| 0060h |
| 0080h |
| 00A0h |
| 00C0h |
| 00E0h |
Description
Enables option ROM scan.
Enables device(s) as a PCI bus master.
Specifies the minimum guaranteed number of PCI bus clocks that a device can master on a PCI bus during one transaction.
42 | Configuration Software and Utilities |