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Theory of Operation
Table
Modes | Descriptions |
|
|
Gted | The wveform is output only while: |
| An externl trigger signl from the TRIG IN connector on the rer pnel. |
| A gte signl through the FORCE TRIGGER button on the rer pnel is |
| TRUE. |
| A control commnd such s trigger or event from remote device. |
|
|
Enhnced | The wveform is obtined, in the order defined with the sequence, bsed on: |
| A trigger signl for exmple, n externl trigger signl from the TRIG IN |
| connector on the rer pnel. |
| An externl trigger signl from the TRIG IN connector on the rer pnel. |
| An event signl from the EVENT IN connector on the rer pnel. |
| An trigger signl from the FORCE TRIGGER button on the front pnel. |
| An event signl from the FORCE EVENT button on the front pnel. |
| A control commnd such s trigger, event or jump from remote device. |
|
|
Analog Circuit. The Analog Circuit block contains the Filter, Attenuator, Output Amplifier, Calibration and Offset Circuits. These circuits are used to process signals generated from the DAC. Option 02 has Calibration Circuits only.
Memory Address Control. The Memory Address Control controls the addresses used to read waveform memory data.
This block loads the first address of the waveform into the Address Counter that was loaded into the waveform memory. It loads the waveform data length to the Length Counter. The Address Counter specifies the point from which the waveform was generated and the Length Counter waveform ending position.
The Address and Length Counters operate with clocks produced by quarter
If the repeat count value has been loaded in the Repeat Counter, the waveform is generated the specified number of times.
This block controls the sequence to the event signals generated in Enhanced Mode.
Figure 3±3 shows the relationship between the memory address control and the waveform memory.
AWG710 Service Manual |