R

Chapter 4: Designing with the Core

containing the end-of-packet information for channel 2. Finally, the start-of-packet and address information for channel 3 are sent in the payload control word (C3).

If the payload control words did not contain SOP indications (such as payload resumes), the Source core would not be required to enforce minimum SOP spacing. The Source core will then pack the EOP and Payload Control word into a single cycle and will not insert idle cycles. This behavior is illustrated in Figure 4-23.

SrcFFClk

 

 

 

SrcFFWrEn_n

 

 

 

SrcFFAddr

CH1

CH2

CH3

SrcFFData

1A 1B -- --

2A 2B 2C --

3A 3B -- --

SrcFFMod

100

110

100

SrcFFSOP

 

 

 

SrcFFEOP

 

 

 

TDClk_P

 

 

 

TDat_P

 

 

C1 1A 1B I I I I I C2 2A 2B 2C I I I I C3

TCtl_P

 

 

 

Figure 4-22:Source Data Path - Minimum SOP Spacing Enforced

SrcFFClk

 

 

 

SrcFFWrEn_n

 

 

 

SrcFFAddr

CH1

CH2

CH3

SrcFFData

1A 1B -- --

2A 2B 2C --

3A 3B -- --

SrcFFMod

100

110

100

SrcFFSOP

 

 

 

SrcFFEOP

 

 

 

TDClk_P

 

 

 

TDat_P

 

 

C1 1A 1B C2 2A 2B 2C C3

TCtl_P

 

 

 

Figure 4-23:Source Data Path - Short Packet Transfers

The Source core formats the data to be written onto the SPI-4.2 Lite bus (TDat). Table 4-6shows an example of the formatting that this block does with the data read-out of the Source FIFO (control words are binary and payload transfers are hexadecimal). When an SOP is read out of the FIFO, the following 16-bit word transfer sent on the SPI-4.2 data bus is an SOP control word. This example shows the receipt of an SOP for channel 2 and two

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SPI-4.2 Lite v4.3 User Guide

 

 

UG181 June 27, 2008

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Xilinx UG181 manual 22Source Data Path Minimum SOP Spacing Enforced

UG181 specifications

Xilinx UG181 refers to the User Guide for the Xilinx 7 Series FPGAs, which offers a comprehensive overview of the architecture, capabilities, and features of these powerful field-programmable gate arrays (FPGAs). Designed to cater to a wide range of applications, Xilinx 7 Series FPGAs are widely adopted in industries such as telecommunications, automotive, aerospace, and consumer electronics.

One of the main features of the Xilinx 7 Series FPGAs is their use of advanced 28nm technology, which enables them to achieve high performance while maintaining low power consumption. This fine process technology not only ensures better power efficiency but also allows for increased logic density. The 7 Series includes several families, such as Artix-7, Kintex-7, and Virtex-7, each tailored for specific application demands ranging from cost-sensitive solutions to high-performance data processing.

Xilinx 7 Series FPGAs also incorporate a rich set of programmable logic resources. This includes Look-Up Tables (LUTs), Flip-Flops, and Digital Signal Processing (DSP) slices that have been optimized for various arithmetic functions. With several thousands of logic cells available, designers can implement complex algorithms and systems directly in hardware for improved performance over traditional software solutions.

In addition to their logic capabilities, Xilinx 7 Series FPGAs feature an array of high-speed serial communication interfaces. These include support for technologies like PCI Express, Gigabit Ethernet, and Serial RapidIO, which facilitate efficient data transfer and integration into enterprise-level systems. The presence of high-speed transceivers also makes them ideal for applications that require fast data handling like video processing or high-frequency trading.

Furthermore, these FPGAs offer extensive memory options, including support for a wide range of external memory interfaces. This versatility allows for the integration of high-bandwidth memory solutions, which is essential for performance-intensive applications. With the introduction of the Memory Controller IP, users can easily connect various memory types, ensuring flexibility in system design.

Finally, Xilinx has made significant strides in development tools for 7 Series FPGAs, providing a robust ecosystem for design engineers. With design suites such as Vivado and SDK, users benefit from a comprehensive platform for deciding, simulating, and implementing designs efficiently. The combination of advanced hardware capabilities and powerful software tools solidifies the position of Xilinx 7 Series FPGAs as a preferred choice for custom digital hardware design across various industries.