Synthesis

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Before attempting timing simulation, follow the steps below to ensure that the simulator environment is properly configured.

1.Compile the Xilinx SimPrim libraries (if not already compiled). For details, see Xilinx Answer Record 15338.

2.Run the design through the Xilinx tool flow. An implement script is provided with the example design. The user may use this script as an example for creating their environment. For details about the implementation script, see the SPI-4.2 Lite Getting Started Guide.

3.Compile the post-par simulation model. An example timing simulation script is provided with the example design, and may be used as an example for creating the user test environment. For details about the timing simulation script, see the SPI-4.2 Lite Getting Started Guide.

Synthesis

Synthesis of Example Design

Synthesis of the example design is supported by XST and Synplify. While other synthesis tools may be used to synthesize the example design, they have not been tested and functionality can not guaranteed. For detailed use of the example design, see the SPI-4.2 Lite Getting Started Guide.

XST

Before synthesizing with XST, be sure that the Xilinx environment is properly configured for use. A sample synthesis script is provided in the implement directory and can be used as an example for synthesizing the user design.

1.Create an XST project file or open the Xilinx ISE™ GUI.

2.Add the necessary user source files to the project file or ISE GUI. If creating a project file, also add the unisim_comp.v[hd] file located in the <Xilinx Install Path>/[vhdl verilog]/src/ise/ directory. This file is included automatically when using the ISE GUI.

3.Synthesize the user application.

•If using the Project Navigator ISE environment, double-click Synthesize-XST in the Processes for Source window. Set the HDL language to VHDL or Verilog, the results directory and the part being used.

•If the command line mode is being used, at the prompt, start an XST shell session by typing xst at the prompt and hitting enter. Synthesize the design by calling the XST run command to process the files in the project file.

•For additional options that can be set to further customize synthesis of the user design, see the XST section of the Xilinx development tools manual, located at www.xilinx.com/documentation.

Synplify

Before synthesizing with Synplify, make sure that the Synplify environment is properly configured for use. A sample synthesis script is provided in the implement directory, which can be used as an example for the synthesizing the user design.

1.Create a Synplify project file.

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UG181 June 27, 2008

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Xilinx UG181 manual Synthesis of Example Design, Synplify
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UG181 specifications

Xilinx UG181 refers to the User Guide for the Xilinx 7 Series FPGAs, which offers a comprehensive overview of the architecture, capabilities, and features of these powerful field-programmable gate arrays (FPGAs). Designed to cater to a wide range of applications, Xilinx 7 Series FPGAs are widely adopted in industries such as telecommunications, automotive, aerospace, and consumer electronics.

One of the main features of the Xilinx 7 Series FPGAs is their use of advanced 28nm technology, which enables them to achieve high performance while maintaining low power consumption. This fine process technology not only ensures better power efficiency but also allows for increased logic density. The 7 Series includes several families, such as Artix-7, Kintex-7, and Virtex-7, each tailored for specific application demands ranging from cost-sensitive solutions to high-performance data processing.

Xilinx 7 Series FPGAs also incorporate a rich set of programmable logic resources. This includes Look-Up Tables (LUTs), Flip-Flops, and Digital Signal Processing (DSP) slices that have been optimized for various arithmetic functions. With several thousands of logic cells available, designers can implement complex algorithms and systems directly in hardware for improved performance over traditional software solutions.

In addition to their logic capabilities, Xilinx 7 Series FPGAs feature an array of high-speed serial communication interfaces. These include support for technologies like PCI Express, Gigabit Ethernet, and Serial RapidIO, which facilitate efficient data transfer and integration into enterprise-level systems. The presence of high-speed transceivers also makes them ideal for applications that require fast data handling like video processing or high-frequency trading.

Furthermore, these FPGAs offer extensive memory options, including support for a wide range of external memory interfaces. This versatility allows for the integration of high-bandwidth memory solutions, which is essential for performance-intensive applications. With the introduction of the Memory Controller IP, users can easily connect various memory types, ensuring flexibility in system design.

Finally, Xilinx has made significant strides in development tools for 7 Series FPGAs, providing a robust ecosystem for design engineers. With design suites such as Vivado and SDK, users benefit from a comprehensive platform for deciding, simulating, and implementing designs efficiently. The combination of advanced hardware capabilities and powerful software tools solidifies the position of Xilinx 7 Series FPGAs as a preferred choice for custom digital hardware design across various industries.
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