Xilinx UG181 manual Number of Complete Training Sequences a

Models: UG181

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Sink Core Interfaces

R

Table 2-6:Sink Static Configuration Signals

Name

Direction

Range

Description

 

 

 

 

NumDip4Errors[3:0]

Static

1-15

Number of DIP-4 Errors: The Sink Interface will go

 

Input

Value of 0 is set to 1

out-of-frame (assert SnkOof) and stop accepting data

 

 

from the SPI-4.2 bus after receiving NumDip4Errors

 

 

 

 

 

 

consecutive DIP-4 errors.

 

 

 

 

NumTrainSequences[3:0]

Static

1-15

Number of Complete Training Sequences: A

 

Input

Value of 0 is set to 1

complete training pattern consists of 10 training

 

 

control words and 10 training data words. The Sink

 

 

 

 

 

 

interface requires NumTrainSequences consecutive

 

 

 

training patterns before going in frame (deasserting

 

 

 

SnkOof) and accepting data from the SPI-4.2 bus.

 

 

 

 

SnkCalendar_M[7:0]

Input

0-255

Sink Calendar Period: The SnkCalendar_M parameter

 

 

(effective range 1-256)

sets the number of repetitions of the calendar sequence

 

 

before the DIP-2 parity and framing words are

 

 

 

 

 

 

inserted.

 

 

 

The core implements this parameter as a static register

 

 

 

synchronous to SnkStatClk, and it can be updated in

 

 

 

circuit by first deasserting SnkEn.

 

 

 

Note that the Sink Calendar Period equals

 

 

 

SnkCalendar_M + 1. For example, if

 

 

 

SnkCalendar_M=22, the Sink Calendar Period will be

 

 

 

equal to 23.

 

 

 

 

SnkCalendar_Len[8:0]

Input

0-511

Sink Calendar Length: The SnkCalendar_Len

 

 

(effective range 1-512)

parameter sets the length of the calendar sequence.

 

 

 

 

 

 

The core implements this parameter as a static register

 

 

 

synchronous to SnkStatClk, and it can be updated in

 

 

 

circuit by first deasserting SnkEn.

 

 

 

Note that the Sink Calendar Length equals

 

 

 

SnkCalendar_Len + 1. For example, if

 

 

 

SnkCalendar_Len=15, the Sink Calendar Length will

 

 

 

be equal to 16.

 

 

 

 

SnkAFThresAssert[8:0]

Static

1–508

Sink Almost Full Threshold Assert: The

 

Input

Values less than1 are

SnkAFThresAssert parameter defines the minimum

 

 

set to 1.

number of empty FIFO locations that exist when

 

 

Values greater than

SnkAlmostFull_n is asserted. Note that the assert

 

 

508 are set to 508.

threshold must be less than or equal to the negate

 

 

 

threshold (SnkAFThresNegate).

 

 

 

When SnkAlmostFull_n is asserted, the core initiates

 

 

 

the flow control mechanism selected by the parameter

 

 

 

FifoAFMode. The FifoAFMode defines when the

 

 

 

interface stops sending valid FIFO status levels and

 

 

 

begins sending flow control information on RStat. This

 

 

 

indicates to the transmitting device that the core is

 

 

 

almost full and additional data cannot be sent.

 

 

 

 

SPI-4.2 Lite v4.3 User Guide

www.xilinx.com

27

UG181 June 27, 2008

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Xilinx UG181 manual Number of Complete Training Sequences a

UG181 specifications

Xilinx UG181 refers to the User Guide for the Xilinx 7 Series FPGAs, which offers a comprehensive overview of the architecture, capabilities, and features of these powerful field-programmable gate arrays (FPGAs). Designed to cater to a wide range of applications, Xilinx 7 Series FPGAs are widely adopted in industries such as telecommunications, automotive, aerospace, and consumer electronics.

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