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Chapter 7

Simulating and Implementing the Core

The SPI-4.2 Lite core is provided as a Xilinx technology-specific netlist and simulation model. The following sections describe how to simulate and implement the SPI-4.2 Lite core in a user design.

Functional Simulation

Functional simulation of the SPI-4.2 Lite core is performed with the provided simulation models (UniSim models). The simulation models provide cycle-accurate simulations for use in the verification of the user's application. The SPI-4.2 Lite core has been verified with the Mentor Graphics® ModelSim® PE/SE/EE simulator. While other simulation tools can be used to simulate the core, they have not been tested and functionality cannot be guaranteed. Before attempting functional simulation, perform the following steps to ensure that the simulator environment is properly configured:

1.Compile the Xilinx UniSim libraries (if not already compiled). For details, see Xilinx Answer Record 15338.

2.Compile the simulation model, user application, and user test environment. An example functional simulation script is provided with the example design, which compiles the example design and demonstration test bench. You may use this script as an example for creating their test environment. For details about the functional simulation script, see the SPI-4.2 Lite Getting Started Guide.

Generating a Simulation Model

The functional simulation model generated by the SPI-4.2 Lite core is created using the NETGEN tool. Following is the NETGEN command that is used to generate simulation model for the Sink core:

netgen -sim -ofmt <vhdlverilog> <component_name>_pl4_lite_snk_top.ngc <component_name>_pl4_snk_top.vhd

Generating a Simulation Model with Initialized Calendar

You can program the Sink and Source status calendars in the following ways:

•Using the CORE Generator GUI, initialize the content of the calendar block RAM.

•Using the appropriate calendar programming signals during system operation.

If you choose to program the calendar during system operation, use the provided function simulation models to verify you design. However, if you choose to initialize the calendar by defining the initial content of the calendar BRAM, you must generate the functional simulation models using the steps provided in this section.

SPI-4.2 Lite v4.3 User Guide

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UG181 June 27, 2008

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Xilinx UG181 manual Simulating and Implementing the Core, Functional Simulation, Generating a Simulation Model
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UG181 specifications

Xilinx UG181 refers to the User Guide for the Xilinx 7 Series FPGAs, which offers a comprehensive overview of the architecture, capabilities, and features of these powerful field-programmable gate arrays (FPGAs). Designed to cater to a wide range of applications, Xilinx 7 Series FPGAs are widely adopted in industries such as telecommunications, automotive, aerospace, and consumer electronics.

One of the main features of the Xilinx 7 Series FPGAs is their use of advanced 28nm technology, which enables them to achieve high performance while maintaining low power consumption. This fine process technology not only ensures better power efficiency but also allows for increased logic density. The 7 Series includes several families, such as Artix-7, Kintex-7, and Virtex-7, each tailored for specific application demands ranging from cost-sensitive solutions to high-performance data processing.

Xilinx 7 Series FPGAs also incorporate a rich set of programmable logic resources. This includes Look-Up Tables (LUTs), Flip-Flops, and Digital Signal Processing (DSP) slices that have been optimized for various arithmetic functions. With several thousands of logic cells available, designers can implement complex algorithms and systems directly in hardware for improved performance over traditional software solutions.

In addition to their logic capabilities, Xilinx 7 Series FPGAs feature an array of high-speed serial communication interfaces. These include support for technologies like PCI Express, Gigabit Ethernet, and Serial RapidIO, which facilitate efficient data transfer and integration into enterprise-level systems. The presence of high-speed transceivers also makes them ideal for applications that require fast data handling like video processing or high-frequency trading.

Furthermore, these FPGAs offer extensive memory options, including support for a wide range of external memory interfaces. This versatility allows for the integration of high-bandwidth memory solutions, which is essential for performance-intensive applications. With the introduction of the Memory Controller IP, users can easily connect various memory types, ensuring flexibility in system design.

Finally, Xilinx has made significant strides in development tools for 7 Series FPGAs, providing a robust ecosystem for design engineers. With design suites such as Vivado and SDK, users benefit from a comprehensive platform for deciding, simulating, and implementing designs efficiently. The combination of advanced hardware capabilities and powerful software tools solidifies the position of Xilinx 7 Series FPGAs as a preferred choice for custom digital hardware design across various industries.
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