409
Logic Analyzer Concepts
The Analyzer Hardware
Probing
The probing circuit includes the probe cable and terminations. The
probe cable consists of two 17-channel pods which are connected to
the circuit board using a high-density connector. Sixteen single-ended
data channels and one single-ended clock/data channel per pod are
passed to the circuit board. If the clock/data channel is not used as a
state clock in state acquisition mode, it is available as a data channel.
The clock/data channel is also available as a data channel in timing
acquisition mode. Eight (1670’s), six (1671’s), four (1672’s), or two
(1673’s) clock/data channels are available as data channels; however,
only four clock/data channels can be assigned as clock channels in the
1670’s, 1671’s, and 1672’s. In the 1673’s, only two clock/data channels
can be assigned as clock channels.
The cables use nichrome wire woven in polyarmid yarn for reliability
and durability. The pods also include one ground path per channel in
addition to a pod ground. The channel grounds are configured such
that their electrical distance is the same as the electrical distance of
the channel. The probe tip assemblies and termination modules
connected at the end of the probe cables have a divide-by-10 RC
network that reduces the amplitude of the data signals as seen by the
circuit board. This adds flexibility to the types of signals the circuit
board can read in addition to improving signal integrity.
The terminations on the circuit board are resistive terminations that
reduce transmission line effects on the cable. The terminations also
improve signal integrity to the comparators by matching the
impedance of the probe cable channels with the impedance of the
signal paths of the circuit board. All 17 channels of each pod are
terminated in the same way. The signals are reduced by a factor of 10.
Comparators
Two proprietary 9-channel comparators per pod interpret the incoming
data and clock signals as either high or low depending on where the
user- programmable threshold is set. The threshold voltage of each pod
is individually programmed, and the voltage selected applies to the
clock channel as well as the data channels of each pod.
Each of the comparator ICs has a serial test input port used for testing