Agilent Technologies E4406A VSA Preset the Status Byte, Questionable Register, STATus PRESet

NOTE

NOTE

Language Reference

STATus Subsystem

Preset the Status Byte

:STATus:PRESet

Sets bits in most of the enable and transition registers to their default state. It presets all the Transition Filters, Enable Registers, and the Error/Event Queue Enable. It has no effect on Event Registers, Error/Event QUEue, IEEE 488.2 ESE, and SRE Registers as described in IEEE Standard 488.2-1992, IEEE Standard Codes, Formats, Protocols and Common Commands for Use with ANSI/IEEE Std 488.1-1987. New York, NY, 1992.

Key Type: There is no equivalent front panel key.

Questionable Register

Questionable Condition

:STATus:QUEStionable:CONDition?

This query returns the decimal value of the sum of the bits in the Questionable Condition register.

The data in this register is continuously updated and reflects the current conditions.

Key Type: There is no equivalent front panel key.

Questionable Enable

:STATus:QUEStionable:ENABle <number>

:STATus:QUEStionable:ENABle?

This command determines what bits in the Questionable Event register will set the Questionable Status Summary bit (bit3) in the Status Byte Register. The variable <number> is the sum of the decimal values of the bits you want to enable.

The preset condition is all bits in this enable register set to 0. To have any Questionable Events reported to the Status Byte Register, one or more bits need to be set to 1. It is recommended that all bits be enabled in this register. The Status Byte Event Register should be queried after each measurement to check the Questionable Status Summary (bit 3). If it is equal to 1, a condition during the test may have made the test results invalid. If it is equal to 0, this indicates that no hardware problem or measurement problem was detected by the analyzer.

Key Type: There is no equivalent front panel key.

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