MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Glossary-8 Freescale Semiconductor
Reservation. The processor establishes a reservation on a cache block of memory space
when it executes an lwarx instruction to read a memory semaphore into a GPR.
Reserved field. In a register, a reserved field is one that is not assigned a function. A
reserved field may be a single bit. The handling of reserved bits is
implementation-dependent. Software is permitted to write any value to such a bit.
A subsequent reading of the bit returns 0 if the value last written to the bit was 0
and returns an undefined value (0 or 1) otherwise.
RISC (reduced instruction set computing). An architecture characterized by
fixed-length instructions with nonoverlapping functionality and by a separate set
of load and store instructions that perform memory accesses .
SScalability. The capability of an architecture to generate implementations specific for a
wide range of purposes, and in particular implementations of significantly greater
performance and/or functionality than at present, while maintaining compatibility
with current implementations.
Scan chain. The peripheral buffers of a device, linked in JTAG test mode, that are
addressed in a shift-register fashion.
Set (v). To write a nonzero value to a bit or bit field; the opposite of clear. The term ‘set’
may also be used to generally describe the updating of a bit or bit field.
Set (n). A subdivision of a cache. Cacheable data can be stored in a given location in any
one of the sets, typically corresponding to its lower-order address bits. Because
several memory locations can map to the same location, cached data is typically
placed in the set whose cache block corresponding to that address was used least
recently. See Set-associative.
Set-associative. Aspect of cache organization in which the cache space is divided into
sections, called sets. The cache controller associates a particular main memory
address with the contents of a particular set, or region, within the cache.
Significand. The component of a binary floating-point number that consists of an explicit
or implicit leading bit to the left of its implied binary point and a fraction field to
the right.
Slave. A device that responds to the master’s address. A slave receives data on a write cycle
and gives data to the master on a read cycle.
Static branch prediction. Mechanism by which software (for example, compilers) can
give a hint to the machine hardware about the direction a branch is likely to take.
Sticky bit. A bit that when set must be cleared explicitly.
Superscalar machine. A machine that can issue multiple instructions concurrently from a
conventional linear instruction stream.