CPM Multiplexing
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
16-12 Freescale Semiconductor
16.4.2 CMX SI1 Clock Route Register (CMXSI1CR)

The CMX SI1 clock route register (CMXSI1CR), displayed in Figure 16-8, defines the connection of SI1

to the clock sources that can be input from the bank of clocks.

Table16-3 describes CMXSI1CR fields.

16.4.3 CMX SI2 Clock Route Register (CMXSI2CR)

The CMX SI2 clock route register (CMXSI2CR), seen in Figure 16-9, defines the connection of SI2 to the

clock sources that can be input from the bank of clocks.

01234567
Field RTA1CS RTB1CS RTC1CS RTD1CS TTA1CS TTB1CS TTC1CS TTD1CS
Reset 0000_0000
R/W R/W
Addr 0x0x11B00

Figure 16-8. CMX SI1 Clock Route Register (CMXSI1CR)

Table16-3. CMXS I1CR Field Descriptions

Bits Name Description
0 RTA1CS Receive TDM A1 clock source
0 TDM A1 receive clock is CLK1.
1 TDM A1 receive clock is CLK19.
1 RTB1CS Receive TDM B1 clock source
0 TDM B1 receive clock is CLK3.
1 TDM B1 receive clock is CLK9.
2 RTC1CS Receive TDM C1 clock source
0 TDM C1 receive clock is CLK5.
1 TDM C1 receive clock is CLK13.
3 RTD1CS Receive TDM D1 clock source
0 TDM D1 receive clock is CLK7.
1 TDM D1 receive clock is CLK15.
4 TTA1CS Transmit TDM A1 clock source
0 TDM A1 transmit clock is CLK2.
1 TDM A1 transmit clock is CLK20.
5 TTB1CS Transmit TDM B1 clock source
0 TDM B1 transmit clock is CLK4.
1 TDM B1 transmit clock is CLK10.
6 TTC1CS Transmit TDM C1 clock source
0 TDM C1 transmit clock is CLK6.
1 TDM C1 transmit clock is CLK14.
7 TTD1CS Transmit TDM D1 clock source
0 TDM D1 transmit clock is CLK8.
1 TDM D1 transmit clock is CLK16.