MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
xii Freescale Semiconductor
Contents
Paragraph
Number Title
Page
Number
9.6 60x Bus Arbitration Priority............................................................................................ 9-4
9.7 60x Bus Masters............................................................................................................... 9-4
9.8 CompactPCI Hot Swap Specification Support................................................................ 9-5
9.9 PCI Interface ................... ............................ ............................. ............................ ............9-5
9.9.1 PCI Interface Operatio n................ ............................. ............................ ...................... 9-6
9.9.1.1 Bus Commands. ............................ ............................. ............................ .................. 9-6
9.9.1.2 PCI Protocol Fundamentals..................................................................................... 9-7
9.9.1.2.1 Basic Transfer Control .......................... ............................. ............................ ......9- 8
9.9.1.2.2 Addressing .................... .................... ..................... .................... .................... ...... 9-8
9.9.1.2.3 Byte Enable Signals ............................ ............................. ............................ ........9 - 9
9.9.1.2.4 Bus Dr iving and Turnaround............................................................................... 9-9
9.9.1.3 Bus Transactions... ............................ ............................. ............................ .............. 9-9
9.9.1.3.1 Read and Write Transactions ......................... .. ............................ ........................ 9-9
9.9.1.3.2 Transaction Termination .......................... ............................ .......................... ....9- 11
9.9.1.4 Other Bus Operations ....... ............................. ............................ ............................ 9-13
9.9.1.4.1 Device Selection ....................... .. ............................. ............................ .............. 9-13
9.9.1.4.2 Fast Back-to-Back Transactions ................ ............................ ............................ 9-14
9.9.1.4.3 Data Streaming ................... .. ............................. ............................ .................... 9-14
9.9.1.4.4 Host Mode Configuration Acces s ............................ ............................ .............. 9-15
9.9.1.4.5 Agent Mode Configurati on Access ........................... ............................ ............ 9-16
9.9.1.4.6 Special Cycle Command ...... ............................. ............................ .................... 9-16
9.9.1.4.7 Interrupt Acknowle dge...................................................................................... 9-17
9.9.1.5 Error Functions ..................... .. ............................. .......................... .. ...................... 9-17
9.9.1.5.1 Parity. ............................ ............................. ............................ ............................ 9-17
9.9.1.5.2 Error Reporting. .. ............................ ............................. ............................ .......... 9-18
9.9.2 PCI Bus Arbitration ................ ............................. ............................ .......................... 9-19
9.9.2.1 Bus Parking..... ............................ ............................. ............................ .................. 9-19
9.9.2.2 Arbitration Algorithm ................... ............................. ............................ ................ 9-19
9.9.2.3 Master Latency Timer. ............................ ............................. ............................ ......9- 20
9.10 Address Map ....................... ............................ ............................. ............................ ......9-21
9.10.1 Address Map Programming.......................................................................................9-24
9.10.2 Address Translation .......... ............................ ............................. ............................ ....9-24
9.10.2.1 PCI Inbound Translation........................................................................................ 9-25
9.10.2.2 PCI Outbound Translation..................................................................................... 9-26
9.10.3 SIU Registers .................. .. ............................ ............................. ............................ ....9-26
9.11 Configuration Registers .............. .. ............................. ............................ ........................ 9-27
9.11.1 Memory-Mapped Conf i g u rat i on Registers.......... ............................ .......................... 9-27
9.11.1.1 Message Uni t (I2O) Registers ................ ............................. ............................ ......9- 30
9.11.1.2 DMA Controlle r Registers................ ............................. ............................ ............ 9-30
9.11.1.3 PCI Outbound Translation Address Registers (POTARx) ....................................9-30
9.11.1.4 PCI Outbound Base Address Registers (POBARx) ............................................. 9-31