ATM Controller and AAL0, AAL1, and AAL5
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 30-9
For information about cell rate pacing, see Section30.3.5, “ATM Traffic Type.” For information about
prioritization, see Section30.3.6, “ Determining the Priority of an ATM Channel.”
30.3.2 APC Unit Scheduling Mechanism
The APC unit consists of an APC data structure in the dual-port RAM for each PHY and a special
scheduling algorithm performed by the CP. Each PHY’s APC data structure includes three elements: an
APC parameter table, an APC priority table, and cell transmission scheduling tables f or each priority level.
(See Section 30.10.4, “APC Data Structure.”)
Each PHY’s APC parameter table holds parameters that define the priority table location, the number of
priority levels, and other APC parameters. The priority table holds pointers that define the location and
size of each priority level’s scheduling table.
Each scheduling table is divided into time slots, as shown in Figure 30-1. The user determines the number
of ATM cells to be sent each time slot (cells per s lot). After a cha nnel is sent, it is removed from the cur rent
time slot and advanced to a future time slot according to the channel’s assigned traffic rate (specified in
time slots). The PCR parameter in the TCT , or the S CR or M CR parameter s in the T CT extens ion (TCTE)
determine the channel’s actual rate.
Figure 30-1. APC Scheduling Table Mechanism
Table30-1. ATM Service Types
Service Type Cell Rate Pacing Real-Time/
Non-Real-Time Relative Priority
CBR PCR RT 1 (highest)
VBR-RT PCR, SCR (peak-and-sustain) RT 2
VBR-NRT PCR, SCR (peak-and-sustain) NRT 3
ABR1
1When ABR flow control is active, the CP automatically adapts the APC parameters PCR,
PCR_FRACTION. These parameters function as the channel’s allowed cell rate (ACR).
PCR NRT 4
UBR+ PCR, MCR (peak-and-minimum) NRT 5
UBR PCR NRT 6 (lowest)
1
5
9
4
6
7 8 2
3
Cells per Slot
Number of Slots
Current Slot Cell Rescheduling