MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 23-1
Chapter 23 SCC BISYNC Mode
The byte-oriented BISYNC protocol was developed by IBM for use in networking products. There are
three classes of BISYNC frames—transparent, nontransparent with header, and nontransparent without
header, shown in Figure23-1. The t ransparent frame type in BISYNC is not related to transparent mode,
discussed in Chapter 24, “SCC Transparent Mode.” Transparent BISYNC mode allows full binary data to
be sent with any possible character pattern. Each class of f rame starts with a standard two-octet
synchronization pattern and ends with a block check code (BCC). The end-of-text character (ETX) is used
to separate the text and BCC fields.
The bulk of a frame is divided into fields whose meaning depends on the frame type. The BCC is a 16-bit
CRC format if 8-bit characters are used; it is a combination longitudinal (sum check) and vertical (parity)
redundancy check if 7-bit characters are used. In transparent operation, a special character (DL E) is
defined that tells the receiver that the next character is text, allowing BISYNC control characters to be
valid text data in a frame. A DLE sent as data must be preceded by a DLE character. This is sometimes
called byte-stuffing. The physical layer of the BISYNC communications link must synchronize the
receiver and transmitter, usually by sending at least one pair of synchronization characters before each
frame.
BISYNC protocol is unusual in that a transmit underrun need not be an error. If an underrun occurs, a
synchronization pattern is sent until data is again ready. In nontransparent operation, the receiver discards
additional synchronization characters (SYNCs) as they are received. In transparent mode, DLE-SYNC
pairs are discarded. Normally, for proper transmission, an underrun must not occur between the DLE and
its following character. This failure mode cannot occur with the PowerQUICC II.
An SCC can be configured as a BISYNC controller to handle basic BISYNC protocol in normal and
transparent modes. The controller can work with the time-slot assigner (TSA) or nonmultiplexed serial
interface (NMSI). The controller has separate transmit and receive sections whose operations are
asynchronous with the core and either synchronous or asynchronous with other SCCs.
Nontransparent with Header
SYN1 SYN2 SOH Header STX Text ETX BCC
Nontransparent without Header
SYN1 SYN2 STX Text ETX BCC
Transparent
SYN1 SYN2 DLE STX Transparent Text DLE ETX BCC
Figure 23-1. Classes of BISYNC Frames