MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
lxviii Freescale Semiconductor
Tab le s
Tabl e
Number Title
Page
Number
15-4 SIxGMR Field Descriptions . ...................... ....................... ...................... ...................... ...... 15-17
15-5 SIxMR Field Descripti ons ................. ...................... ....................... ...................... .............. 15-18
15-6 SIxRSR Field Descript ions.... ...................... ....................... ...................... ...................... ....1 5-24
15-7 SIxCMDR Field Description ..................... ....................... ...................... .. ...................... .... 15-25
15-8 SIxSTR Field Descripti ons .................... ......................... ...................... ...................... ........ 15-25
15-9 IDL Signal Descriptions. .. ...................... ....................... ...................... ...................... .......... 15-27
15-10 SIx RAM Entries for an IDL Interfac e .................... ... ...................... ...................... ............ 15-29
15-11 GCI Signals .................... ........................ ....................... ...................... ...................... .......... 15-31
15-12 SIx RAM Entries fo r a GCI Interface (SCIT Mode)..........................................................15-33
16-1 Clock Source Options ........ ...................... ....................... ...................... .. ...................... ........ 16-6
16-2 CMXUAR Field Descriptions............................................................................................... 16-7
16-3 CMXSI1CR Field Descrip tions ..................... ....................... ........................ ...................... 16- 12
16-4 CMXSI2CR Field Descrip tions ..................... ....................... ........................ ...................... 16- 13
16-5 CMXFCR Field Descriptions . ...................... .. ....................... ...................... ...................... ..16 - 14
16-6 CMXSCR Field Descriptions . ...................... .. ....................... ...................... ...................... ..16 - 16
16-7 CMXSMR Field Descriptions .................... ....................... ...................... ...................... .. .... 16-19
17-1 BRGCx Field Description s ........................ ....................... ...................... ...................... ........ 17-3
17-2 BRG External Clock Source Optio n s ..................... ....................... .. ...................... ................ 17-4
17-3 Typical Baud Rates for Asynchronous Communication.......................................................17-5
18-1 TGCR1 Field Descriptions. ...................... .. ....................... ...................... ...................... ........ 18-4
18-2 TGCR2 Field Descriptions. ...................... .. ....................... ...................... ...................... ........ 18-5
18-3 TMR1–TMR4 Field Description s ............ .. ....................... ...................... ...................... ........ 18-6
18-4 TER Field Descriptions ...................... ...................... ....................... ...................... ................ 18-8
19-1 SDSR Field Description s... ...................... ....................... ........................ ...................... ........ 19-3
19-2 PDTEM and LDTEM Field Descripti o n s ...... ....................... .. ...................... ...................... ..1 9 - 4
19-3 IDMA Transfer Parameters ................ ...................... ....................... ...................... ................ 19-6
19-4 IDMAx Parameter RAM ...................... ....................... ...................... ...................... ............ 19-18
19-5 DCM Field Descriptions ........ ...................... ....................... ...................... ........................ ..19- 20
19-6 IDMA Channel Data Transfer Operation....... ....................... ...................... ...................... ..19 -21
19-7 Valid Memory-to-Memory STS/DTS Values......... ....................... .. ...................... .............. 19-22
19-8 Valid STS/DTS Values for Peripherals ................ .. ....................... ...................... .. .............. 19-23
19-9 IDSR/IDMR Field Descri ptions............. ....................... ...................... ...................... .......... 19-24
19-10 IDMA BD Field Descript ions.... ........................ ....................... ...................... .................... 19-25
19-11 IDMA Bus Exceptions ............. ...................... ....................... ...................... ...................... ..19-28
19-12 Parallel I/O Register Programming—Port C. .....................................................................19-29
19-13 Parallel I/O Register Programming—Port A...................................................................... 19-30
19-14 Parallel I/O Register Programming—Port D...................................................................... 19-30
19-15 Example: Peripheral-to-M emory Mode—IDMA2 ......... ...................... ...................... .. ...... 19-30
19-16 Example: Memory-to-Peripheral Fly-By Mode (on 60x)–IDMA3 ....................................19-32
19-17 Programming Example: Memory-to-Memory (PCI-to-60x)—IDMA1..............................19-33
20-1 GSMR_H Field Descriptions ........... .. ...................... ... ...................... ...................... .............. 20-3