PCI Bridge
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 9-61
9.11.2.25 PCI Hot Swap Control Status Register

Figure 9-57 and Table9-44 describe the Hot Swap control status register.

Figure 9-57. Hot Swap Control Status Register

Table9-43. Hot Swap Register Block Field Descriptions

Bits Name Description
31–24 Reserved. Should be cleared.
23–16 HS_CSR Hot Swap control status register; see Section9.11.2.25, “PCI Hot Swap Control
Status Register.”
15–8 NXT_PTR Next pointer—an offset into the device’s PCI configuration space for the location
of the next item in the capabilities linked list. A value of 0x00 indicates that this is
the last item in the list.
7–0 CAP_ID CompactPCI ® Hot Swap capability ID (read only).
23 22 21 20 19 18 17 16
Field INS EXT LOO —EIM—
Reset 0000_0000
R/W R/W
Addr 0x4A

Table9-44. Hot Swap Control Status Register Field Descriptions

Bit Name Description
23 INS ENUM status: insertion. Write a ‘1’ to clear this bit.
0 ENUM is not asserted
1 ENUM is asserted
22 EXT ENUM status: extraction. Write a ‘1’ to clear this bit.
0 ENUM is not asserted
1 ENUM is asserted
21–20 Reserved. Should be cleared.
19 LOO LED on/off when the hardware is in state H2. Read/write-able.
0 LED off
1 LED on
18 Reserved. Should be cleared.
17 EIM ENUM signal mask. Read/write-able.
0 Enable signal
1 Mask signal
16 Reserved. Should be cleared.