MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor lvii
Figures
Figure
Number Title
Page
Number
30-22 VCI Filtering Enable Bits ................................................................................................ ...30-39
30-23 Global Mode Entry (GMODE) ................ ....................... .................... ...................... .......... 30-40
30-24 Example of a 1024-Entry Receive Connection Table.........................................................30-42
30-25 Receive Connectio n Table (RCT) Entry .............. ....................... .................... .................... 30-4 3
30-26 AAL5 Protocol-Speci f ic RCT............ .. .................... ... .................... .. ...................... ............ 30-46
30-27 AAL5-ABR Protocol -Specific RCT .............. ....................... ...................... .................... .... 30-47
30-28 AAL1 Protocol-Speci f ic RCT............ .. .................... ... .................... .. ...................... ............ 30-47
30-29 AAL0 Protocol-Speci f ic RCT............ .. .................... ... .................... .. ...................... ............ 30-49
30-30 Transmit Connection Table (TCT) Entry............................................................................30-50
30-31 AAL5 Protocol-Speci f ic TCT...... .. ...................... ..................... .. .................... .. .................. 30-55
30-32 AAL1 Protocol-Speci f ic TCT...... .. ...................... ..................... .. .................... .. .................. 30-56
30-33 AAL0 Protocol-Speci f ic TCT...... .. ...................... ..................... .. .................... .. .................. 30-57
30-34 Transmit Connection Table Extension (TCTE)—VBR Protocol-Specific......................... 30-58
30-35 UBR+ Protocol-Sp ecific TCTE ............... ..................... ...................... .................... ............ 30-59
30-36 ABR Protocol-Spec ific TCTE ......... ...................... ..................... ...................... .................. 30-6 0
30-37 OAM Performance Moni t o ri n g Table .............. .. ..................... .. .................... .. .................... 30- 6 2
30-38 ATM Pace Control Data Structure.................................................... ...... .... .... ...... .... ...... .... 30-64
30-39 The APC Scheduling Table Structure .. ....................... .................... .. .................... .. ............ 30-65
30-40 Control Slot ................ .................... .. ...................... ..................... .. .................... .. ................30-66
30-41 Transmit Buffers and BD Table Example ....................... .................... ...................... .......... 30-67
30-42 Receive Static Buffer All o c at i on Example .............. ... .................... .. .................... .. ............ 30-68
30-43 Receive Global Buffer Al l o c a t i o n Ex a m p l e ....................... .................... .. .................... .. .... 30-69
30-44 Free Buffer Pool Str ucture ................. ...................... ..................... ...................... ................ 30-69
30-45 Free Buffer Pool E ntry..... ...................... ....................... .................... ...................... ............ 30-70
30-46 AAL5 RxBD .............. .................... .. .................... .. ....................... .................... .. ................ 30-71
30-47 AAL1 RxBD .............. .................... .. .................... .. ....................... .................... .. ................ 30-73
30-48 AAL0 RxBD .............. .................... .. .................... .. ....................... .................... .. ................ 30-74
30-49 User-Defined Cell— RxBD Extension ............... ....................... .................... ...................... 30- 76
30-50 AAL5 TxBD ........ .................... .. .................... .. ..................... .. .................... .. ...................... 30 -76
30-51 AAL1 TxBD ........ .................... .. .................... .. ..................... .. .................... .. ...................... 30 -78
30-52 AAL0 TxBDs ................. .. ...................... ..................... .. .................... .. .................... .. .......... 30-79
30-53 User-Defined Cell— TxBD Extension ......... ....................... .................... ...................... ...... 30-80
30-54 AAL1 Sequence Number (S N ) P rot ection Table..... ... .................... .. .................... .. ............ 30-80
30-55 Interrupt Queue Structure........... .................... ....................... .................... ...................... ....30-82
30-56 Interrupt Queue Entry ................ ...................... ..................... ...................... .................... ....30-82
30-57 UTOPIA Master Mode Signal s.......... .. ....................... .................... .. .................... .. ............ 30-84
30-58 UTOPIA Slave Mode S ignals ...................... ..................... ...................... ...................... ...... 30-86
30-59 FCC ATM Mode Register (FPSMR)..................................................................................30-88
30-60 ATM Event Register (FCCE)/FCC Mask Registe r (FCCM) .................... .................... .. .... 30-91
30-61 FCC Transmit Internal Rate Regi s ters (FTIRRx) ............... .. .................... .. ...................... .. 3 0 - 92
30-62 FCC Transmit Internal Rate Clo ck i n g ........................ .................... .. ...................... ............ 30-92