Memory Controller
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 11-29

Table11-11 describes MDR fields.

11.3.7 Memory Address Register (MAR)

The memory address register (MAR) is shown in Figure 11-13.

Table11-12 describes MAR fields.

015
Field MD
Reset xxxx_xxxx_xxxx_xxxx1
R/W R/W
Addr 0x0x10188
16 31
Field MD
Reset xxxx_xxxx_xxxx_xxxx1
R/W R/W
Addr 0x1018A
1 Undefined at reset.

Figure 11-12. Memory Data Register (MDR)

Table11-11. MDR Field Descriptions

Bits Name Description
0–31 MD Memory data. The data to be read or written into the RAM array when a WRITE or READ command is
supplied to the UPM.
015
Field A
Reset xxxx_xxxx_xxxx_xxxx1
R/W R/W
Addr 0x0x10168
16 31
Field A
Reset xxxx_xxxx_xxxx_xxxx1
R/W R/W
Addr 0x10116A
1 Undefined at reset.

Figure 11-13. Memory Address Register (MAR)