NEC 1080Xd If a Reboot Occurs, I/O Space, PCI Bus Number, If an expanded PCI Gap was specified

Models: 1080Xd

1 216
Download 216 pages 14.64 Kb
Page 169
Image 169
I/O Space:

!Select “HBB Configuration” in the System Hardware menu.

!Specify resources as follows. Use the resource size calculated in step 2. PCI Gap:

“Low MMIO Configuration” menu or “High MMIO Configuration” menu specifies PCI Gap (see “Low MMIO Configuration Submenu” and “High MMIO Configuration Submenu.)”

“Low MMIO configuration” menu is used when the PCI Gap is assigned to the address space that is less than 4GB.

“High MMIO Configuration” menu is used when the PCI Gap is assigned to the address space that is larger than 4GB. Use the following procedure to enable the specified values in “High MMIO configuration” menu:

Select “System Hardware.”

Select “Memory Mapped I/O > 4GB” in System Hardware menu.

Select “Enable” in Memory Mapped I/O > 4GB submenu (see “Memory Mapped I/O > 4GB submenu”).

I/O Space:

See “IO Space Configuration Submenu.”

PCI Bus Number:

See “PCI Bus Configuration Submenu.”

If a Reboot Occurs

When procedures are completed in the previous section, “Preparing the Resources,” exit from the Setup menu. Select “Exit Saving Changes” from the Exit menu (see “Exit Menu”).

Reboot the system. A reboot might occur again during the reboot process. Two possible causes for reboot are:

!Expanded PCI Gap was specified in preparing the resources (see “Procedures for Preparing the Resources”).

!The resource values specified in preparing the resources were incorrect (see “Procedures for Preparing the Resources”).

If an expanded PCI Gap was specified:

Reboot. The following BIOS event log is generated: “910A Low MMIO Space Size Updated.”

The second reboot occurred because the PCI Gap (Low MMIO) had expanded. The second reboot is a correct procedure. The system operation can be continued when the reboot procedure is completed.

BIOS Setup 4-61

Page 169
Image 169
NEC 1080Xd manual If a Reboot Occurs, I/O Space, PCI Bus Number, If an expanded PCI Gap was specified