Paradyne 9126 Data Port Physical Interface Options 2, Max Port Rate Kbps, Port Base Rate Kbps

4. Configuration Options

Table 4-7. Data Port Physical Interface Options (2 of 5)

Max Port Rate (Kbps)

Possible Settings: 1536, 2048

Default Setting: 1536

Specifies the maximum clock rate for a user data port. The data rate for this port is limited to the rate specified by this option so that the maximum rate supported by an attached DTE is not exceeded.

Display Conditions – This option only appears when the Port Use is set to Frame Relay and, if the unit has multiple data ports, the selected port is Port-2.

1536 – The maximum port rate for the port is 1536 Kbps.

2048 – The maximum port rate for the port is 2048 Kbps.

Port Base Rate (Kbps)

Possible Settings: Nx64, Nx56

Default Setting: Nx64

Specifies the base rate for the data port, which is a multiple (from 1 to 24) of the base rate specified by this option. N is a number from 1 to 24.

Display Conditions – This option only appears when Port Use is set to Synchronous Data. This option does not appear for a FrameSaver SLV 9128-II.

Nx64 – The base rate for the port is 64 Kbps.

Nx56 – The base rate for the port is 56 Kbps.

Invert Transmit Clock

Possible Settings: Auto, Enable, Disable

Default Setting: Auto

Determines whether the clock supplied by the FrameSaver unit on interchange circuit DB (ITU 114) – Transmit Signal Element Timing (DCE Source) TXC is phase inverted with respect to the clock used to time the incoming Transmitted Data (TD).

Auto – The port checks the clock supplied by the DCE on TXC on this port. If necessary, the port automatically phase inverts the clock with respect to the transmitted data.

Enable – Phase inverts the TXC clock. Use this setting when long cable lengths between the FrameSaver unit and the DTE are causing data errors.

Disable – Does not phase invert the TXC clock.

Transmit Clock Source

Possible Settings: Internal, External

Default Setting: Internal

Determines whether the DTE’s transmitted data is clocked into the FrameSaver unit by its internal transmit clock or by the external clock provided by the DTE.

NOTE: Changing settings for this configuration option causes the FrameSaver unit to abort any physical port tests, including any DTE-initiated loopback tests.

Internal – The FrameSaver unit uses the interchange circuit DB (ITU 114) – Transmit Signal Element Timing (TXC) (DCE source) for timing the incoming data.

External – The DTE provides the clock for the transmitted data, and the FrameSaver unit uses the interchange circuit DA (ITU 113) – Transmit Signal Element Timing (XTXC) (DTE source) for timing the incoming data.

9128-A2-GB20-80 September 2002 4-39