TMP92CZ26A

92CZ26A-139

3.7.10 Port F (PF0 to PF5, PF7)

Port F0 to F5 are 6-bit gene ral-purpose I/O ports. Resetting sets PF0 to PF5 to be input
ports. It also sets all bits of the output latch register to “1”. In addition to functioning as
general-purpose I/O port pins, PF0 to PF5 can also function as the output for I2S0, I2S1. A
pin can be enabled for I/O by writing a “1” to the corresponding bit of the Port F Function
Register (PFFC).
Port F7 is 1-bit general-purpose output port. In addition to functioning as
general-purpose output port, PF7 can also function as the SDCLK output. Resetting sets
PF7 to be a SDCLK output port.
(1) Port F0 (I2S0CKO), Port F1 (I2S0DO), Port F2 (I2S0WS), Port F3 (I2S1CKO), Port F4
(I2S1DO), Port F5 (I2S1WS), Port F0 to F5 are general-purpose I/O port. They are also
used either I2S. Each pin is belo w.
I2Smode
(I2S0Module)
I2Smode
(I2S1Module)
PF0 I2S0CKO
(Clock output) PF4 I2S1CKO
(Clock output)
PF1 I2S0DO
(Data output) PF5 I2S1DO
(Data output)
PF2
I2S0WS
(Word-select
output)
PF6 I2S1WS
(Word-select
output)