TMP92CZ26A

92CZ26A-494

(6) SPIRD (SPI Receiv e Data Register)

SPIRD0, SPIRD1 registers are for reading received data.

SPIRD0 Register
7 6 5 4 3 2 1 0
bit Symbol RXD7 RXD6 RXD5 RXD4 RXD3 RXD2 RXD1 RXD0
Read/Write R
After reset 0 0 0 0 0 0 0 0
Function Receive data register [7:0]
15 14 13 12 11 10 9 8
bit Symbol RXD15 RXD14 RXD13 RXD12 RXD11 RXD10 RXD9 RXD8
Read/Write R
After reset 0 0 0 0 0 0 0 0
Function Receive data register [15:8]
SPIRD1 Register
7 6 5 4 3 2 1 0
bit Symbol RXD7 RXD6 RXD5 RXD4 RXD3 RXD2 RXD1 RXD0
Read/Write R
After reset 0 0 0 0 0 0 0 0
Function Receive data register [7:0]
15 14 13 12 11 10 9 8
bit Symbol RXD15 RXD14 RXD13 RXD12 RXD11 RXD10 RXD9 RXD8
Read/Write R
After reset 0 0 0 0 0 0 0 0
Function Receive data register [15:8]

Figure 3.17.13 SPIRD register

This bit is for reading received data. When read, read it after confirming status of RFUL or

REND. The data is ov erwritten if write next data with transmit FIFO is not empty.

Receive regis ter ex ist 4byt es. Theref or e, it is possibl e read ing by using 4b yt e instruction (u se

DMA together it etc.)

However, when read data basically, read the data from 834 addresses. (There is exception)

Method of reading dat a (i nstruction) is restricted. Please refer to following table.

UNIT receiving
(No using FIFO) Sequential receiving
(Using FIFO)
Receive
data
read size
Instruction
example
1byte
receiving
<unit16>=0
2 byte
receiving
<unit16>=1
1 byte
receiving
<unit16>=0
2 byte
receiving
<unit16>=1
ld a,(0x834) Prohibit Prohibit 1byte read
ld a,(0x835) Prohibit Prohibit
2 byte read ld wa,(0x834) *1
4 byte read ld xwa,(0x834) *2 *3
: Read only valid data when CPU is reading.
: Read valid data + invalid d ata when CPU is reading. Invalid data must be deleted after read.
: Read only invalid data when CPU is reading.
*1: 834 address = valid data, 835 address = Invalid data,
*2: 834 address = valid data, 835 address = Invalid data, 836 address = Invalid data, 837 address = Invalid data
*3: 834 address = valid data, 835 address = valid data, 836 address = Invalid data, 837 address = Invalid data
SPIRD0
(834H)
(835H)
SPIRD1
(836H)
(837H)