Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-150, 3.7.14 Port L (PL0 to PL7)

TMP92CZ26A
92CZ26A-150
3.7.14 Port L (PL0 to PL7)
PL0 to PL7 are 8-bit output ports. Resetting sets the output latch PL to “0”, and PL0 to
PL7 pins output “0”. In addition to functioning as a general-purpose output port, Port L
can also function as a data bus for LCD controller (LD0 to LD7). Above setting i s used the
function register PLFC.
Figure 3.7.36 Port L0 to L7
Selector
A
B
S
PL0 to PL7
(LD0 to LD7)
Function
control
PLFC write
R
Output latch
PL write
Reset
LD0 to LD7
PL read
Internal data bus