TMP92CZ26A

92CZ26A-591

3.22.2 Control registers

ALM register

7 6 5 4 3 2 1 0

bit Symbol AL8 AL7 AL6 AL5 AL4 AL3 AL2 AL1
Read/Write R/W
After reset 0 0 0 0 0 0 0 0
Function Setting alarm pattern

MELALMC register

7 6 5 4 3 2 1 0

bit Symbol FC1 FC0 ALMINV − − − − MELALM
Read/Write R/W R/W R/W R/W R/W R/W R/W
After reset 0 0 0 0 0 0 0 0
Function
Free-run counter
control
00: Hold
01: Restart
10: Clear
11: Clear & Start
Alarm
Wavefor
m invert
1:INVERT
Always write “0” Select
Output
Wavefor
m
0: Alarm
1: Melody
Note1: MELALMC<FC1> is read always “0”.
Note2: When setting MELALMC register except <FC1:0> during the free-run counter is running, <FC1:0> is kept “01”.

MELFL register

7 6 5 4 3 2 1 0

bit Symbol ML7 ML6 ML5 ML4 ML3 ML2 ML1 ML0
Read/Write R/W
After reset 0 0 0 0 0 0 0 0
Function Setting melody frequency (lower 8bit)

MELFH register

7 6 5 4 3 2 1 0

bit Symbol MELON ML11 ML10 ML9 ML8
Read/Write R/W R/W
After reset 0 0 0 0 0
Function
Control
melody
counter
0: Stop &
Clear
1: Start
Setting melody frequency(upper 4bit)

ALMINT register

7 6 5 4 3 2 1 0

bit Symbol − IALM4E IALM3E IALM2E IALM1E IALM0E
Read/Write R/W R/W
After reset 0 0 0 0 0 0
Function
Always
write “0” 1:INTALM4
(1Hz)
enable
1:INTALM3
(2Hz)
enable
1:INTALM2
(64Hz)
enable
1:INTALM1
(512Hz)
enable
1:INTALM0
(8192Hz)
enable
Note: INTALM0 to INTALM4 prohibit that set to enable at same time. If setting to enable, set only 1.

ALM
(1330H)
MELALMC
(1331H)
MELFL
(1332H)
MELFH
(1333H)
ALMINT
(1334H)