Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-103

TMP92CZ26A
92CZ26A-103
Sample2) Calculation examples for CPU + LDMA
Conditions 1:
CPU operation speed (fSYS) : 60 MHz
Display RAM : Internal RAM
Display size : QVGA (320seg × 240com)
Display quality : 65536 colors (TFT)
Refresh rate : 70 Hz (including 20 clocks of dummy cycles)
Calculation example 1:
t
STOP (LDMA) = ((SegNum × K / 8) × tLRD) + (1 / fSYS [Hz])
= ((320
× 16 / 8) × 1 / fSYS [Hz] / 4) + (1 / fSYS [Hz])
= ((640)
× 16.67 [ns] / 4) + 16.67 [ns]
= 2.68 [μs]
LHSYNC [period: s] = 1/70 [Hz] /(COM+20=260) = 54.95 [μs]
CPU bus stop rate = tSTOP (LCD)[s] / LHSYNC [period: s]
= 2.68 [μs] / 54.95 [μs] = 4.88 [%]
Conditions 2:
CPU operation speed (fSYS) : 10 MHz
Display RAM : 16-bit external SRAM (0 waits)
Display size : QVGA (240seg × 320com)
Display quality : 4096 colors (STN)
Refresh rate : 100 Hz (0 dummy cycles)
Calculation example 2:
t
STOP (LDMA) = (SegNum × K / 8) × tLRD
= (240
× 12 / 8) × ( 2 + wait count) / fSYS [Hz] / 2
= (360)
× 200 [ns] / 2
= 36 [μs]
LHSYNC [period: s] = 1/100 [Hz] / (COM = 240) = 41.67 [μs]
CPU bus stop rate = tSTOP (LCD)[s] / LHSYNC [period: s]
= 36 [μs] / 41.67 [μs] = 86.40 [%]