Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG 5. Table of Special function registers (SFRs)

TMP92CZ26A
92CZ26A-665
5. Table of Special function registers (SFRs)
The SFRs include the I/O ports and periph eral control reg isters allocated to t he 8-Kbyte address
space from 000000H to 001FF0H.
(1) I/O Port (13) Clock gear, PLL
(2) Interrupt control (14) 8-bit timer
(3) Memory cont roller (15) 16-bit tim er
(4) TSI(Touch screen I/F) (16) SIO
(5) SDRAM controller (17) SBI
(6) LCD controller (18) AD converter
(7) PMC (19) Watchdog timer
(8) USB controller (20)RTC(Real time c lock)
(9) SPI controller (21)MLD(Melody/alarm generator)
(10) MMU (22)I2S
(11) NAND-Flash controller (23) MAC
(12) DMA controller
Table layout
Symbol Name Address 7 6 1 0
Bit Symbol
Read/Write
Initial value after reset
Remarks
Note: “Prohibit RMW” in the table means that you cannot use RMW instructions on these register.
Example: When setting bit0 only of the register PxCR, the instruction “SET 0, (PxCR)” cannot be
used. The LD (transfer) instruction must be used to write all eight bits.
Read/Write
R/W: Both read and write are possible.
R: Only read is possible.
W: Only write is possible.
W*: Both read and write are possib le (when this bit is read as1)
Prohibit RMW: Read modify writ e instructions are pr ohibited. (The EX, ADD, ADC, BUS,
SBC, INC, DEC, AND, OR, XOR, STCF, RES, SET, CHG, TSET, RLC,
RRC, RL, RR, SLA, SRA, SLL, SRL, RLD and RRD instruction are re ad
modify write instruct ions.)
R/W*: Read modify write is prohibited when controlling the pu ll -up resistor.