Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-518

TMP92CZ26A
92CZ26A-518
3.19.3.3 Basic Operation
The following diagram shows the basic timings of the waveforms generated by the
LCDC and adjustable elements. The adjustable elements for each signal includ e enable
time, phase, and delay time.
The signals used and their connections and settings vary with the LCD driver type
(STN/TFT) and specifications to be used.
LCP0 signal
(Only at valid data output)
(Always output)
LD23-LD0 signal
Signal Name
LDINV signal
LVSYNC signal
(Enable width control)
(Phase control)
LHSYNC signal
LLOAD signal
LGOEn signal
(Enable width control)
(Phase control)
(Delay control)
LFR signal (FREDGE=0)
(Frame divide control)
(Line)
(Dot)
LLOAD signal
LLOAD signal details
Frame period (Refresh rate)
(Phase control)
(Enable width control)
(Phase control)
(Enable width control)
(Delay control)
(Line divide)
(Dot divide)
(Valid data output)
(Phase control)
(Line divide)
(Dot divide)
LFR signal (FREDGE=1)
DLS=0 (Line inversion)