TMP92CZ26A

92CZ26A-496

3.18 I2S (Inter-IC Sound)

The TMP92CZ26A incorporates serial output circuitry that is compliant with the I2S format.
This function enables the TMP92CZ26A to be used for digital audio systems by connecting an
LSI for audio output such as a DA converter.
The I2S unit has the following features:
Table 3.18.1 I2S Operation Features
Item Description
Number of Channels 2 channels
Format I2S-format compliant
Right-justified and left-justified formats supported
Stereo / monaural
Master transmission only
Pins used 1. I2SnCKO (clock output)
2. I2SnDO (output)
3. I2SnWS (Word Select output)
WS frequency
Data transfer rate Refer to “Setting the transfer clock generator and Word Select signal”.
Transmission buffer 64 bytes x 2
Direction of data MSB-first or LSB-first selectable
Data length 8 bits or 16 bits
Clock edge Rising edge or falling edge
Interrupt INTI2Sn
(64-byte FIFO empty interrupt)