TMP92CZ26A

92CZ26A-151

Port L register

7 6 5 4 3 2 1 0

bit Symbol PL7 PL6 PL5 PL4 PL3 PL2 PL1 PL0
Read/Write R/W
After reset 0 0 0 0 0 0 0 0
Port L function register

7 6 5 4 3 2 1 0

bit Symbol PL7F PL6F PL5F PL4F PL3F PL2F PL1F PL0F
Read/Write W
After reset 0 0 0 0 0 0 0 0
Function 0: Port 1: Data bus for LCDC (LD7 toLD0)
Port L drive register

7 6 5 4 3 2 1 0

bit Symbol PL7D PL6D PL5D PL4D PL3D PL2D PL1D PL0D
Read/Write R/W
After reset 1 1 1 1 1 1 1 1
Function Input/Output buffer drive register for standby mode
Note 1: Read-Modify-Write is prohibited for the registers PLFC.

Figure 3.7.37 Register for Port L

PL
(0054H)
PLFC
(0057H)
PLDR
(0095H)