Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-305

TMP92CZ26A
92CZ26A-305
TMRB0 Flip-Flop Control Register
7 6 5 4 3 2 1 0
Bit symbol − − TB0C1T1 TB0C0T1 TB0E1T1 TB0E0T1 TB0FF0C1 TB0FF0C0
Read/Write W* R/W W*
After Reset 1 1 0 0 0 0 1 1
TB0FF0 inversion trigger
0: Disable trigger
1: Enable trigger
Function Always write “11”
*Always read as “11”. When
capture
UC10 to
TB0CP1H/L
When
capture
UC10 to
TB0CP0H/L
When UC10
matches
with
TB0RG1H/L
When UC10
matches
with
TB0RG0H/L
Control TB0FF0
00: Invert
01: Set
10: Clear
11: Undefined
*Always read as “11”.
Timer flip-flop control(TB0FF0)
00 Invert
01 Set to “11”
10 Clear to “00”
<TB0FF0C1:0>
11 Undefined (Always read as “11”)
Figure 3.13.6 Register for TMRB (4 )
TB0FF0 control
Inverted when UC10 value matches the valued in TB0RG0H/L
0 Disable trigger
<TB0E0T1> 1 Enable trigger
TB0FF0 control
Inverted when UC10 value matches the valued in TB0RG1H/L
0 Disable trigger
<TB0E1T1> 1 Enable trigger
TB0FF0 control
Inverted when UC10 value is captured into TB0CP0H/L
0 Disable trigger
<TB0C0T1> 1 Enable trigger
TB0FF0 control
Inverted when UC10 value is captured into TB0CP1H/L
0 Disable trigger
<TB0C1T1> 1 Enable trigger
TB0FFCR
(1183H)
Prohibit
read-
modify-
write