TMP92CZ26A

92CZ26A-731

(13) Clock gear, PLL

Symbol Name Address 7 6 5 4 3 2 1 0
XTEN USBCLK1 USBCLK0 WUEF PRCK
R/W R/W R/W
1 0 0 0 0
SYSCR0
System
clock
control
register0
10E0H
Low
-frequency
oscillator
circuit (fs)
0: Stop
1:
Oscillation
Select the clock of
USB(fUSB)
00: Disable
01: Reserved
10: X1USB
11: fPLLUSB
Warm-up
timer
Select
Prescaler
clock
0: fSYS/2
1: fSYS/8
GEAR2 GEAR1 GEAR0
R/W
1 0 0
SYSCR1
System
clock
control
register1
10E1H Select gear value of high
frequency (fc)
000: fc 101: (Reserved)
001: fc/2 110: (Reserved)
010: fc/4 111: (Reserved)
011: fc/8 100: fc/16
CKOSEL WUPTM1 WUPTM0 HALTM1 HALTM0
R/W
0 0 1 0 1 1
SYSCR2
System
clock
control
register2
10E2H Always
write “0”.
Select
CLKOUT
0: fSYS
1: fs
Warm-Up Timer
00: Reserved
01: 28/inputted frequency
10:214/inputted frequency
11:216/inputted frequency
HALT mode
00: Reserved
01: STOP mode
10: IDLE1 mode
11: IDLE2 mode
PROTECT EXTIN DRVOSCH DRVOSCL
R R/W R/W R/W R/W
0 0 0 1 1
EMCCR0 EMC
control
register0 10E3H Protect flag
0: OFF
1: ON
Always
write “0”.
1: External
clock
fc oscillator
drive ability
1: NORMAL
0: WEAK
fs oscillator
drive ability
1: NORMAL
0: WEAK
EMCCR1 EMC
control
register1 10E4H
EMCCR2 EMC
control
register2 10E5H
Switching the protect ON/OFF by write to following 1st-KEY,2nd-KEY
1st-KEY: EMCCR1=5AH,EMCCR2=A5H in succession write
2nd-KEY: EMCCR1=A5H,EMCCR2=5AH in succession write
FCSEL LUPFG
R/W R
0 0
PLLCR0 PLL
control
register0 10E8H Select fc
clock
0 : fOSCH
1 : fPLL
Lock-up
timer
Status flag
0 : not end
1 : end
PLL0 PLL1 LUPSEL
PLLTIMES
R/W R/W
0 0 0 0
PLLCR1 PLL
control
register1 10E9H
PLL0 for
CPU
0: Off
1: On
PLL1 for
USB
0: Off
1: On
Select
stage of
Lock up
counter
0: 12 stage
(for PLL0)
1:13 stage
(for PLL1)
Select the
number of
PLL
0: ×12
1: ×16