TMP92CZ26A

92CZ26A-319

• Integer divider (N divider)
For example, when the source clock frequency (fc) is 19.6608 MHz, the input
clock is φT2, the frequency divider N (BR0CR<BR0S3:0>) = 8, and
BR0CR<BR0 ADD E> = 0, the baud rate in UART Mode is as follows:
*Clock state System clock : 1/1
Prescaler clock : 1/2
Baud Rate = = 19.6608106 × 106 ÷ 16 ÷ 8 ÷ 16 = 9600 (bps)
Note: The N + (16 – K) / 16 division function is disabled and setting BR0ADD
<BR0K3:0> is invalid.
• N+(16-K)/16 divid er (UART Mode only)
Accordingly, when the source clock frequency (fc) = 15.9744 MHz, the input
clock is φT2, the frequency divider N (BR0CR<BR0S3:0>) = 6, K
(BR0ADD<BR0K3:0>) = 8, and BR0CR <BR0ADDE> = 1, the baud rate in UART
Mode is as follows:
*Clock state System clock : 1/1
Prescaler clock : 1/2
Baud Rate = ÷ 16 = 15.9744 × 106 ÷ 16÷ (6 + ) ÷ 16
= 9600 (bps)
Table 3.14.2 show examples of UART Mode tr ansfer rates.
Additionally, the external clock input is available in the serial clock. (Serial
Channel 0). The meth od for calculating the baud r ate is explained below:
• In UART Mode
Baud rate = external clock input frequency ÷ 16
It is necessary to satisfy (external clock input cycle) ≥ 4/fSYS
• In I/O Interface Mode
Baud rate = external clock input frequency
It is necessary to satisfy (external clock input cycle) ≥ 16/fSYS
÷ 16
fC/16
8
fC /16
6 + (16 – 8)
16
8
16