Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-263

TMP92CZ26A
92CZ26A-263
3. Read (including ECC data read)
Reading vali d data
; ***** Read valid data*****
;
ldw (ndfmcr0),5008h ; CE1 enable
ldw (ndfmcr0),50A8h ; WE enable, CLE enable
ldw (ndfdtr0),0000h ; Read command 1
ldw (ndfmcr0),50C8h ; ALE enable
ldw (ndfdtr0),00xxh ; Address write (4 or 5 times)
ldw (ndfmcr0),50A8h ; WE enable, CLE enable
ldw (ndfdtr0),0030h ; Read command 2
;
; Wait set up time (from Busy to Ready)
; 1. Flag polling
; 2. Interrupt
;
ldw (ndfmcr0),540Dh ; ECC reset, ECC circuit enable, decode mo de
ldw xxxx,(ndfdtr0) ; Data read (259 times: 518 bytes)
(256-times:512byte)
ldw (ndfmcr0),550Ch ; RSECGW enable
ldw xxxx,(ndfdtr0) ; Read ECC (5 times: 80 bits)
;
; Wait set up time (20 system clocks)
;
(1) Error bit calculation
ldw (ndfmcr1),0047h ; Error bit calculation interrupt enable
ldw (ndfmcr0),560Ch ; Error bit calculation circuit start
;
; Wait set up time
; Interrupt routine (End of calculation for Reed-Solomon Error bit)
;
INT: ldw xxxx,(ndfmcr1) ; Check error status ”STATE3:0, SEER1:0”
;
; If error is found, the error processing routine is performed to
; correct the error data. For details see 3.11.3.2 “Error Correction
; Methods”.
;
; The read operation is repeated four times to read 2112 bytes.
;