Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-617, 3.24.3 Control Registers

TMP92CZ26A
92CZ26A-617
3.24.3 Control Registers
The watchdog timer (WDT) is controlled by two control registers WDMOD and WDCR.
(1) Watchdog timer mode registers (WDMOD)
1. Setting the detection tim e for the watchdog timer in <WDTP1:0>
This 2-bit register is used for setting the watchdog timer interrupt time used
when detecting runaway.
On a reset this register is initialized to WDMOD< WDTP1:0> = 00.
The detection time for WDT is 215/fIO [s]. (The number of system clocks is
approximately 65, 536.)
2. Watchdog timer enable/disab le control register <WDTE>
At reset, the WDMOD<WDTE> is initialized to “1”, enabling the watchdog
timer.
To disable the watchdog timer, it is necessary to clear this bit to “0” and to write
the disable code (B1H) to the watchdog timer control register (WDCR). This
makes it difficult for the watchdog timer to be disabled by runaway.
However, it is possible to return the watchdog timer from the disabled state to
the enabled state merely by setting <WDTE> to “1”.
3. Watchdog timer out reset connection <RESCR>
This register is used to connect the output of the watchdog timer with the
RESET termina l internal ly. Since WDMOD<RESC R> is initia lized t o 0 at reset, a
reset by the watchdog timer will not be performed.
(2) Watchdog timer control registers (WDCR)
This register is used to di sabl e and clear the binary counter for the watchdog timer.
• Disable control
The watchdog timer can be disabled b y clearing WD MOD<WDTE> to 0 and t hen
writing the disab le code (B1H) to th e WDCR regist er.
WDCR ← 0 1 0 0 1 1 1 0 Write the clear code (4EH).
WDMOD ← 0 −
−XX− − 0 Clear WDMOD <WDTE> to “0”.
WDCR ← 1 0 1 1 0 0 0 1 Write the disable code (B1H).
• Enable control
Set WDMOD<WDTE> t o “1”.
• Watchdog timer clear control
To clear the binary counter and cause counting to resume, write the clear code
(4EH) to the WDCR register.
WDCR ← 0 1 0 0 1 1 1 0 Write the clear code (4EH).
Note1: If it is used disable control, set the disable code (B1H) to WDCR after write the clear code (4EH) once. (Please
refer to setting example.)
Note2: If it is changed Watchdog timer setting, change setting after set to disable condition once.