Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-608

TMP92CZ26A
92CZ26A-608
3.23.2.4 AD Conversion Modes a nd AD Conversion-End Interrupts
The ADC sup ports the follow ing four conversio n modes. For a n ormal AD convers ion,
ADMOD0<1:0> select one of the four conversion modes. For a high-priority AD
conversion, the ADC only supports Channel Fixed Sing le Conv ersion mo de.
a. Channel Fixed Single Conversion mode
b. Channel Scan Sing le Conversion mode
c. Channel Fixed Repeat Conversion mo de
d. Channel Scan Re pe at Conversion mode
(1) Normal AD conversion
ADMOD0<REPEAT, SCAN> select the conversion mode. Once a conversion is
started, the ADMOD0<BUSY> is set to “1”. The ADC generates the AD Conversion
End interrupt (INTAD) and sets the ADMOD0< EOS> to “1” at t he end of the specified
conversion process.
a. Channel Fixed Single Conversion mode
This mode is selected by programming ADMOD0<REPEAT, SCAN> to “00”.
In this mode, the ADC performs a single conversion on a single selected
channel. When a conversion is completed, the ADC sets the ADMOD0<EOS>,
and generates the INTAD interrupt. ADMOD0<EOS> is cleared to “0” when it is
read.
b. Channel Scan Single Conversion mode
This mode is selected by programming ADMOD0<REPET, SCAN> to “01”. In
this mode, the ADC performs a single conversion on each of a selected group of
channels. When a single conversion sequence is completed, ADMOD0<EOS> is
set to “1”, and generates the INTAD interrupt. ADMOD0<EOS> is cleared to “0”
by reading this bit only.
c. Channel Fixed Repeat Co nversion mode
This mode is selected by programming ADMOD0<REPET, SCAN> to “10”. In
this mode, the ADC repeatedly converts a single selected channel. When a
conversion process is com pl eted, ADMOD0<EOS> is set to “1”.
ADMOD1<ITM> control INTAD interrupts generation in this mode. The
timing when ADMOD0<EOS> is set also depends on the ADMOD1<ITM>. The
EOCF bit is cleared when it is read. ADMOD0<EOS> is cleared to “0” by reading
this bit only.
If ADMOD1<ITM> is set to “0”, the ADC generates an interrupt after each
conversion. The results of conversion are always stored in the ADREGxH/L
register. The ADMOD 0<EOS> is set to “1” when the ADC stores t he results to the
ADREGxH/L.