Toshiba H1 Series, TLCS-900, TMP92CZ26AXBG TMP92CZ26A , 92CZ26A-325

TMP92CZ26A
92CZ26A-325
(9) Transmission buffer
The transmission buffer (SC0BUF) shifts out and sends the transmission data
written from the CPU form the least significant bit (LSB) in order. When all the bits
are shifted out, the transmission buffer becomes empty and generates an INTTX0
interrupt.
(10) Parity control circuit
When SC0CR<PE> in the serial channel control register is set to 1, it is possible to
transmit and receive data with parity. However, parity can be added only in 7-bit
UART mode or 8-bit UART mode. The SC0CR<EVEN> field in the serial channel
control register allows either even or odd parity to be selected.
In the case of transmission, parity is automatically generated when data is written
to the transmission buffer SC0BUF. The data is transmitted after the parity bit has
been stored in SC0BUF<TB7> in 7-bit UART mode or in SC0MOD0<TB8> in 8-bit
UART mode. SC0CR<PE> and SC0CR<EVEN> must be set before the transmission
data is written to the transmission b uffer.
In the case of receiving, data is shifted into receiving buffer 1, and the parity is
added after the data has been transferred to receiving buffer 2 (SC0BUF), and then
compared with SC0BUF<RB7> in 7-bit UART mode or with SC0CR<RB8> in 8-bit
UART mode. If th ey are not equal, a parity err or is generated an d the SC0CR<P ERR>
flag is set.
(11) Error flags
Three error flags are provided to increase the reliability of data recep tion.
1. Overrun error <OERR>
If all the bits of the next data item have been received in receiving buffer 1
while valid data still remains stored in receiving buffer 2 (SC0BUF), an overrun
error is generated.
The below is a recommended flow when the overrun error is generated.
(INTRX interrupt routine)
1) Read receiving buffer
2) Read error flag
3) If <OERR> = 1
then
a) Set to disable rec eiving (Write 0 to SC0MOD0<RXE>)
b) Wait to terminate current frame
c) Read receiving buffer
d) Read error flag
e) Set to enable rec eiving (Write 1 to SC0MOD 0<RXE>)
f) Request to transmit again
4) Others
Note: Overrun errors are gene rated onl y with rega rd to re ceive buffer 2 (SC0BU F). Thus, if SC0C R<RB8> is not
read, no overrun error will occur.