TMP92CZ26A

92CZ26A-598

AD Mode Control Register 2 (High-priority conversion control)
7 6 5 4 3 2 1 0
bit Symbol HEOS HBUSY HADS HHTRGE HTSEL1 HTSEL0
Read/Write R R R/W
After reset 0 0 0 0 0 0
Function High-priority
AD conversion
sequence
FLAG
0: During
conversion
sequence
or before
starting
1: Complete
conversion
sequence
High-priority
AD conversion
BUSY Flag
0:Stop
conversion
1:During
conversion
Start
High-priority
AD conversion
0: Don’t Care
1: Start AD
conversion
Always read
as”0”.
High-priority
AD conversion
at Hard ware
trigger
0: Disable
1: Enable
Select Hard ware trigger
00: INTTB10 interrupt
01: Reserved
10: ADTRG
11: I2S Sampling Counter
Output
AD Mode Control Register 3 (High-priority conversion control)
7 6 5 4 3 2 1 0
bit Symbol HADCH2 HADCH1 HADCH0
Read/Write R/W R/W R/W
After reset 0 0 0 0 0
Function Alwa ys wr it e
“0”. High-priority analog input channel select
Always write
“0”.
Figure 3.23.4 AD Conversion Register s
A
DMOD2
(12BAH)
A
DMOD3
(12BBH)
Analog input channel select
<HADCH2:0>
Analog input
channel when
High-priority
conversion
000 AN0
001 AN1
010 AN2
011 AN3(note)
100 AN4
101 AN5
110 Reserved
111 Reserved
Note: When using PG3 pin as ADTRG , it cannot be set.