TMP92CZ26A

92CZ26A-663

4.3.11 SPI Controller

Variable
Parameter Symbol
Min Max
80MHz 60 MHz Unit
SPCLK frequency ( = 1/S) fPP 20 20 15 MHz
SPCLK rising time tr 6 6 6
SPCLK falling time tf 6 6 6
SPCLK low width tWL 0.5S 6 19 28
SPCLK high width tWH 0.5S 6 19 28
Output data valid SPCLK rising tODS 0.5S 18 7 15
SPCLK rising/ falling
Output data hold tODH 0.5S 10 15 23.4
Input data valid
SPCLK rising/ falling tIDS 5 5 5
SPCLK rising/ falling
Input data valid tIDH 5 5 5
ns
AC measuring condition
Clock of top column in above table shows system clock frequency, and “S” in “Variable” show
SPCLK clock cycle [ns].
CL = 25 pF
SPCLK Output
(at SPIMD<TCPOL,RCPOL>= “11”)
SPDO Output
fPP
tr
tf
0.2VCC
0.7 VCC tWL tWH
tODS tODH
tIDS tIDH
SPDI Input
SPCLK Output
(at SPIMD<TCPOL,RCPOL>= “00”)