TMP92CZ26A

92CZ26A-531

3. LLOAD Signal
The LLOAD signal is used to control the timing for th e LCD driver to r eceive display
data. The period of the L LOA D signal synchro nizes to one line of display. It is defined
as an integral multiple of the reference clock LCP0.
The LHSYNC signal and LLOAD signal differs in that the LHSYNC signal is output
all the time whereas the LLOAD signal is output only at valid data lines (commons).
Display data is output in synchronization with the LLOAD signal. Therefore, if a
delay is inserted in the LLOAD signal through the LCDLDDLY register, data output
is also delayed.
Also note that when LCDLDDLY<PDT>=1 , data is output one LCP0 clock later than
the LLOAD signal.
LCDLDDLY<PDT>=0: Data is output in synchronization with the LLOAD signal.
LCDLDDLY<PDT>=1: Data is output one LCP0 clock later than the LLOAD signal.
The delay time for the LLOAD signal is controlled based on LCDLDDLY<PDT>=1.
Therefore, even if the delay time is set to “0” with LCDLDDLY<PDT>=0, the LLOAD
signal is output with a delay of one LCP0 clock. Be careful about this point.
LCP0 signal
LD23-LD0 signal
LDINV signal
LLOAD signal
LLOAD signal LCDLDDLY<PDT> = 1
LHSYNC signal
LLOAD signal
LVSYNC signal
Front dummy LHSYNC
(Vertical front porch)
LLOAD: Common size
(Valid data)
Back dummy LHSYNC
(Vertical back porch)
Refresh rate
LD23-LD0 signal