TMP92CZ26A

92CZ26A-238

3.11 NAND Flash Controller (NDFC)

3.11.1 Features

The NAND Flash Controller (NDFC) is provided with dedicated pins for connecting with
NAND Flash memory.
The NDFC also has an ECC calculation function for error correction and supports two types
of ECC calculation met hods. The ECC calculation method using Ham ming codes can be used for
NAND Flash memory of SLC (Single Level Cell) type and is capable of detecting a single-bit
error for every 256 bytes. The ECC calculation method using Reed-Solomon codes can be used
for NAND Flash memory of MLC (Multi Level Cell) type and is capable of detecting four error
addresses for every 518 bytes.
Although the NDFC h as two channels (channe l 0, channel 1), all pins except for Chip Enable
are shared between the t wo channels. Only the operation of channel 0 is e xplained here.
The NDFC has the followi ng features:
1) Controls the NAND Flash m emory interface through registers.
2) Supports 8-bit and 16-bit NAND Flash memory devices.
3) Supports page sizes of 512 bytes an d 2048 bytes.
4) Supports large-capacity b lock sizes over 256 Kbytes.
5) Includes an ECC g eneration circuit using Hamming codes (for S L C type).
6) Includes a 4-address (4-byte) error detection circuit using Reed-Solomon coding/
encoding techniques (for MLC type).
Note 1: The WP (Write Protect) pin of NAND Flash is not supported. If this function is needed, prepare it on an
external circuit.
Note 2: The t wo channels cannot be accessed simultaneously. It is necessary to switch between the two channels.