TMP92CZ26A

92CZ26A-366

3.16 USB Controller

3.16.1 Outline

This USB controller (UDC) is design ed for various serial links to construct USB system.
The outline is as follows:
(1) Compliant with USB rev1.1
(2) Full-speed: 12 Mbps (Not supported low-speed (1.5 Mbps))
(3) Auto bus enumeration with 384-byte descriptor RAM
(4) Supported 3 kinds of transfer type: Control, interrupt and bulk
Endpoint 0: Control 64 bytes × 1-FIFO
Endpoint 1: BULK (out) 64 bytes × 2-FIFO
Endpoint 2: BULK (in) 64 bytes × 2-FIFO
Endpoint 3: Interrupt (in) 8 bytes × 1-FIFO
(5) Built-in DPLL which generates sampling clock for receive data
(6) Detecting and gen era ting SOP, EOP, RESUME, RESET and TIMEOUT
(7) Encoding and decoding NRZI data
(8) Inserting and discarding stuffed bit
(9) Detecting and checking CRC
(10) Generating and decoding packet ID
(11) Built-in power management function
(12) Supported dual packet mode
Note1:TMP92CZ26A don’t have special terminal that control pull-up resister for D+pin. So, need to add external
switch and control it.
Note2:There are some difference between our specification and USB 1.1. Refer and check “3.16.11 Notice and
restrictions at first”.