TMP92CZ26A

92CZ26A-491

(3-2) SPIIE(SPI Interrupt Enable Register )
SPIIE register is for enable 4 i nterrupts.
SPIIE Register

7 6 5 4 3 2 1 0

bit Symbol TEMPIE RFULIE TENDIE RENDIE
Read/Write R/W
After Reset 0 0 0 0
Function
TEMP
interrupt
0:enable
1:disable
RFUL
interrupt
0:enable
1:disable
TEND
interrupt
0:enable
1:disable
REND
interrupt
0:enable
1:disable

15 14 13 12 11 10 9 8

bit Symbol
Read/Write
After Reset
Function
Figure 3.17.10 SPIIE Register

(a) <TEMPIE>
Set enable/disabl e o f T EM P interrupt.
(b)<RFULIE >
Set enable/disabl e o f RF UL interrupt.
(c)<TENDIE>
Set enable/disabl e o f T END interrupt.
(d)<RENDIE>
Set enable/disabl e o f R END interrupt.
Note: As for 4 interrupts; 2 transmit interrupts (INTSPITX; TEMP, TEND) and 2 receive interrupts (INTSPIRX; RFUL,
REND), it should be selected one from TEMP and TEND, one from RFUL and REND when using
simultaneously. (Please do not select TEMP and TEND simultaneously. Or RFUL and REND simultaneously.)
SPIIE
(82CH)
(82DH)