AMD Am79C930 manual MAC Firmware Resources

AMD P R E L I M I N A R Y

The Am79C930 device maps the Resource Data regis- ter accesses into 1K–16 of the upper 1 Kbytes of the Flash memory space so that Resource Data may be read from the Flash memory. Byte 0 of the Am79C930 device's Resource Data is mapped to location 1 FC00h of the Flash memory. A maximum of 1K–16 bytes of Re- source Data is allowed by the Am79C930 design.

Note that the upper 16 bytes of the Flash memory are reserved for use by the firmware and the embedded 80188 core for 80188 core initialization. The upper 16 bytes of the Flash memory may not be used to store ISA Plug and Play Resource Data.

MAC Firmware Resources

The Am79C930 device contains an embedded 80188 core that can be used to perform the majority of the tasks necessary to implement the MAC portion of the IEEE

802.11(draft) standard. The following section describes the resources that are available to the 80188 core and, hence, to firmware written for the embedded 80188.

MAC (80188 core) Memory Resources — The Am79C930 device contains several resources that are accessible through the 80188 core. These resources in- clude: up to 128K–128 bytes of SRAM, up to 128 Kbytes of Flash memory, 16 MIR registers, 32 TIR registers, and 16 bytes of peripheral device space attached to the XCE pin. All of the resources that are available to the 80188 core are mapped into 80188 memory space. The LMCS and UMCS registers of the 80188 core must be properly programmed to generate UCS and LCS signals in order to take full advantage of all of the resources pro- vided by the Am79C930 device and associated SRAM, Flash and XCE devices.

(In reality, only UCS is used internally. When an access is performed without the presence of an active UCS

signal, then LCS is assumed, and the access is exter- nally directed toward the SRAM with the SCE signal, or internally to the TAI register set, or to the external XCE device).

Note that the BIU contains at least two separate register spaces. The System Interface Registers (SIR) (space is visible to the system interface, but is not visible to the embedded 80188. The MAC Interface Registers (MIR) space is visible to the embedded 80188, but is not vis- ible to the system interface. Communication between the device driver and the 80188 core occurs indirectly, as the bits of the MIR0 register will affect bits in the General Configuration Register (SIR0) and vice versa. Note that a total of 16 bytes of space is reserved for the MIR registers, while currently only 10 MIR registers are defined. The remaining 6 MIR locations are reserved. Also note that all 32 TIR registers are visible to both the 80188 core and the system interface.

Am79C930 80188 memory resources may be mapped using either of two schemes. One scheme makes 256K separate memory locations usable as 128K of Flash memory space, 128K–128 bytes of SRAM, 64 bytes of BIU, TAI, and XCE resources and 64 bytes of reserved space. The other mapping scheme will alias the Flash memory into a portion of the SRAM space. The following text and tables describe each of the mapping schemes.

The first mapping scheme (scheme “A”) places SRAM, the 32 TIR registers, the 16 MIR registers, and the 16 XCE locations into the lower 128K of memory space. The Flash memory is mapped into the upper 128K of memory space. This scheme requires that the LMCS register of the 80188 core be set to 1FF8h. The UMCS register of the 80188 core must be set to E038h. Also re- quired is that bit 6 of the MIR0 register (the mapping se- lect bit) is set to 0.

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