AMDP R E L I M I N A R Y
MEMORY BUS WRITE ACCESS
Parameter |
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Symbol | Parameter Description | Test Conditions | Min | Max | Unit |
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tmAD | MA[16:0] valid from CLKIN ↓ |
| 2 | 100 | ns |
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tmCD | CE active delay from CLKIN ↓ | Note 1 | 2 | 100 | ns |
tmWD | MWE active delay from CLKIN ↓ |
| 2 | 100 | ns |
tmCQ | MD[7:0] driven from CLKIN ↓ |
| 2 |
| ns |
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tmCV | MD[7:0] valid from CLKIN ↓ |
|
| 100 | ns |
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tmAS | Address Setup Time to MWE ↓ |
|
| ns | |
tmAW | Address Write Access Time | 0 wait states | 160 |
| ns |
| (Note 3) | 1 wait state | 260 |
| ns |
|
| 2 wait states | 360 |
| ns |
tmCW | CE Write Access Time | 0 wait states | 160 |
| ns |
| (Notes 1, 3) | 1 wait state | 260 |
| ns |
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| 2 wait states | 360 |
| ns |
tmWP | MWE Write Access Time | 0 wait states | 150 |
| ns |
| (Note 3) | 1 wait state | 250 |
| ns |
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| 2 wait states | 350 |
| ns |
tmWQ | MWE ↓ to MD[7:0] driven |
|
| ns | |
tmAH | MA[16:0] valid hold from MWE − |
|
| ns | |
tmCH | CE valid hold from MWE − | Note 1 |
| ns | |
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tmWI | CE Inactive Time | Note 1, 2 | 0 |
| ns |
tmSW | MD[7:0] valid setup to MWE − | 0 wait states | 130 |
| ns |
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| 1 wait state | 230 |
| ns |
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| 2 wait states | 330 |
| ns |
tmHW | MD[7:0] valid hold from MWE − | Note 2 |
| ns | |
tmHWZ | MD[7:0] inactive from MWE − | Note 2 | 2 X | 2 X TCLKIN+10 | ns |
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Notes:
1.CE = one of: FCE, SCE, XCE
2.Parameter not included in the production test.
3.Value is dependent upon TCLKIN value. Value given is for CLKIN = 20 MHz.
140 | Am79C930 |