Fujitsu MB86617A manual Contents

LSI Specification		MB86617A
	Contents
CHAPTER 1 OVERVIEW		1
CHAPTER 2 FEATURES		2
CHAPTER 3 CHIP BLOCK		3
3.1. BLOCK D IAGRAM		4
<NORMAL OPERATION M ODE		4
<ASYNCHRONOUS TRANSMIT FIFO EXTENDED MODE		5
<ASYNCHRONOUS RECEIVE FIFO EXTENDED MODE	..........................................................................................................................	6
3.2. FUNCTION OF EACH B LOCK		7
<PHY LAYER CONTROL CIRCUIT		7
<LINK LAYER CONTROL C IRCUIT		7
<TSP IC I NTERFACE		7
<CP IC INTERFACE		7
<DATA BRIDGE		7
CHAPTER 4 PIN ASSIGN MENT		8
4.1. PIN ASSIGNMENT		9
4.2.C ORRESPONDING TABLE OF MB86617A P IN		10
4.3. O UTLINE DRAWING OF PACKAGE		11
CHAPTER 5 PIN FUNCTION		12
5.1. IEEE1394 INTERFACE		13
5.2. ISOCHRONOUS I NTERFACE		14
5.4. MPU I NTERFACE		16
5.5. OTHER PINS		17
5.6. POWER/GND PIN		18
CHAPTER 6 INTERNAL REGISTER		19
CHAPTER 7 INTERNAL REGISTER FUNCT ION DESCRIPTION		25
7.1. M ODE -CONTROLREGISTER		27
7.2. FLAG & STATUS REGISTER		29
Rev.1.0	ii	Fujitsu VLSI