LSI Specification | MB86617A |
7.32. Ping Time Monitor Register
Ping time monitor register is the register that indicates time period of transmitting request packet to receiving response packet to the request.
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| R/W | Bit | Bit |
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| 15 | 14 | 13 |
| 12 |
| 11 | 10 | 9 |
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| 4 | 3 | 2 | 1 | 0 | |||
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5Eh |
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| Ping time monitor |
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Initial Value |
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| “0000 h ” |
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BIT |
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| Ping time |
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| Indicate time period from transmitting request packet to receiving response packet | |||||||||||||||
15 - 0 |
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| - | to the request. | Counts by 20ns unit. |
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monitor |
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| (MSB: bit15, LSB: bit0) |
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Rev.1.0 | 70 | Fujitsu VLSI |
