LSI Specification MB86617A
Rev.1.0 Fujitsu VLSI
v
9.2. DESCRIPTION OF EACH INSTRUCTION............................................................................................................................................... 103
CHAPTER 10 INTERRUPT ..................................................................................................................................................................... 106
10.1. INTERRUPT-FACTOR INDICATOR REGISTER & INTERRUPT-MASK SETTING REGISTER.............................................................107
10.2. INTERRUPT.......................................................................................................................................................................................... 108
10.3. DESCRIPTION OF INTERRUPT............................................................................................................................................................ 109
CHAPTER 11 OPERATION ................................................................................................................................................................... 112
11.1. INITIALIZATION ................................................................................................................................................................................ 113
11.2. SELF -ID PACKET RECEIVING .........................................................................................................................................................114
11.2.1 Self-ID Packet Receive at Bus Reset Process .............................................................................................................115
11.2.2 Self-ID Packet Receive after Transmitting Ping Packet Ping................................................................................ 118
11.3. ASYNCHRONOUS PACKET TRANSMITTING.................................................................................................................................120
11.4. ASYNCHRONOUS PACKET RECEIVING ......................................................................................................................................... 122
11.5. ISOCHRONOUS PACKET TRANSMITTING ..................................................................................................................................... 125
11.6. ISOCHRONOUS PACKET RECEIVING .............................................................................................................................................128
CHAPTER 12 SYSTEM CONFIGURATION................................................................................................................................... 130
12.1. RECOMMENDED CONNECTION FOR 1934 PORT (FOR ONE PORT).......................................................................................... 131
12.2. RECOMMENDED CONNECTION FOR CABLE POWER SUPPLY ..................................................................................................132
12.3. RECOMMENDED CONNECTION FOR BUILD-IN PLL LOOP FILTER .........................................................................................133
12.4. CONFIGURATION OF FEEDBACK CIRCUIT AT CRYSTAL OSCILLATOR ...................................................................................134